Abstract: There is provided a backplane for an organic electronic device including a TFT substrate having a base substrate, a polysilicon layer, a gate dielectric layer, a gate electrode, an interlayer dielectric, and a data electrode; an insulating layer over the TFT substrate; a multiplicity of first openings in the insulating layer having a depth d1; a multiplicity of pixellated diode electrode structures, wherein a first set of diode electrode structures are in the first openings; and a bank structure defining pixel areas over the diode electrode structures; wherein the first openings and first set of diode electrode structures are in at least a first set of the pixel areas.

Abstract: In a method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistors, the semiconductor device is placed in a pressurized sealed chamber and at least two different passivating gases are introduced into the chamber. The two passivating gases can be selected to have one gas suitable for passivating PMOS transistors and the other gas suitable for NMOS transistors.

Abstract: The invention relates to a method of passivating a semiconductor device with two types of transistors, e.g., NMOS and PMOS transistors. The semiconductor device is placed in a pressurized sealed chamber and at least two different passivating gases are introduced into the chamber. Since the two passivating gases can be selected to have one gas suitable for passivating PMOS transistors and the other gas suitable for NMOS transistors, the method of the present invention can achieve a better result for both the NMOS and PMOS transistors.