Patents by Inventor Yaxue ZHANG

Yaxue ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Computing array and processor having the same
    Patent number: 12013809
    Abstract: A computing array includes a plurality of process element groups, and each of the plurality of the process element groups includes four process elements arranged in two rows and two columns and a merging unit. Each of the four process elements includes an input subunit; a fetch and decode subunit configured to obtain and compile the instruction to output a logic computing type; an operation subunit configured to obtain computing result data according to the logic computing type and the operation data; an output subunit configured to output the computing result data. The merging unit is connected to the output subunit of each of the four process elements, and configured to receive the computing result data output by the output subunit of each of the four process elements, merge the computing result data and output the merged computing result data.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: June 18, 2024
    Assignee: BEIJING TSINGMICRO INTELLIGENT TECHNOLOGY CO., LTD.
    Inventors: Peng Ouyang, Yaxue Zhang
  • COMPUTING ARRAY AND PROCESSOR HAVING THE SAME
    Publication number: 20220100699
    Abstract: A computing array includes a plurality of process element groups, and each of the plurality of the process element groups includes four process elements arranged in two rows and two columns and a merging unit. Each of the four process elements includes an input subunit; a fetch and decode subunit configured to obtain and compile the instruction to output a logic computing type; an operation subunit configured to obtain computing result data according to the logic computing type and the operation data; an output subunit configured to output the computing result data. The merging unit is connected to the output subunit of each of the four process elements, and configured to receive the computing result data output by the output subunit of each of the four process elements, merge the computing result data and output the merged computing result data.
    Type: Application
    Filed: September 23, 2021
    Publication date: March 31, 2022
    Inventors: Peng OUYANG, Yaxue ZHANG