Patents by Inventor Yayuan XUE

Yayuan XUE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12255159
    Abstract: An antenna chip packaging structure and a method for preparing the antenna chip packaging structure are disclosed. The method includes forming multiple antenna structures: on a first support substrate with a redistribution layer on the first support substrate; forming each of the multiple antenna structures includes sequentially forming a first antenna layer, a first connection structure, and a first packaging layer on the redistribution layer; sequentially forming a second antenna layer, a second connection structure, and a second packaging layer above the first packaging layer; forming a third antenna layer above the second packaging layer; repeating the antenna structure forming process, before bonding a second support substrate above the last antenna structure on the last packaging layer; removing the first support substrate, and forming a UBM layer below the redistribution layer; and forming a solder ball on the UBM layer and connecting a chip to the UBM layer.
    Type: Grant
    Filed: December 9, 2021
    Date of Patent: March 18, 2025
    Assignee: SJ Semiconductor(Jiangyin) Corporation
    Inventor: Yayuan Xue
  • Patent number: 11798888
    Abstract: A chip packaging structure and a method for preparing the same are disclosed. The method includes: providing a wafer having a first surface and a second surface, forming a first redistribution layer on the first surface, wherein the wafer includes TSVs having first ends exposed from the wafer; forming welding pads electrically connected to the TSVs through the first redistribution layer; forming a trimming groove in an edge area of the wafer; bonding the first surface of the wafer to a first supporting substrate, and thinning the second surface of the wafer to expose the second ends of the TSVs; forming, on the second surface of the wafer, solder balls electrically connected to the TSVs through a second redistribution layer; bonding the second surface of the wafer to a second supporting substrate, and peeling off the first supporting substrate; and connecting the welding pads to a semiconductor chip.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: October 24, 2023
    Assignee: SJ SEMICONDUCTOR (JIANGYIN) CORPORATION
    Inventors: Yayuan Xue, Xingtao Xue, Chengchung Lin
  • Publication number: 20220189878
    Abstract: A chip packaging structure and a method for preparing the same are disclosed. The method includes: providing a wafer having a first surface and a second surface, forming a first redistribution layer on the first surface, wherein the wafer includes TSVs having first ends exposed from the wafer; forming welding pads electrically connected to the TSVs through the first redistribution layer; forming a trimming groove in an edge area of the wafer; bonding the first surface of the wafer to a first supporting substrate, and thinning the second surface of the wafer to expose the second ends of the TSVs; forming, on the second surface of the wafer, solder balls electrically connected to the TSVs through a second redistribution layer; bonding the second surface of the wafer to a second supporting substrate, and peeling off the first supporting substrate; and connecting the welding pads to a semiconductor chip.
    Type: Application
    Filed: December 10, 2021
    Publication date: June 16, 2022
    Inventors: Yayuan Xue, Xingtao Xue, Chengchung Lin
  • Publication number: 20220181278
    Abstract: An antenna chip packaging structure and a method for preparing the antenna chip packaging structure are disclosed. The method includes forming multiple antenna structures: on a first support substrate with a redistribution layer on the first support substrate; forming each of the multiple antenna structures includes sequentially forming a first antenna layer, a first connection structure, and a first packaging layer on the redistribution layer; sequentially forming a second antenna layer, a second connection structure, and a second packaging layer above the first packaging layer; forming a third antenna layer above the second packaging layer; repeating the antenna structure forming process, before bonding a second support substrate above the last antenna structure on the last packaging layer; removing the first support substrate, and forming a UBM layer below the redistribution layer; and forming a solder ball on the UBM layer and connecting a chip to the UBM layer.
    Type: Application
    Filed: December 9, 2021
    Publication date: June 9, 2022
    Inventor: Yayuan Xue
  • Patent number: 11316252
    Abstract: The present disclosure provides an antenna packaging structure and a method for forming the same. The structure includes: a supporting substrate, a rewiring layer on the supporting substrate, a first antenna layer disposed on the rewiring layer, first metal feedline pillars disposed on the first antenna layer, a first packaging layer covering the first metal feedline pillars except exposing the top surfaces of the first metal feedline pillars; a second antenna layer on the first packaging layer, second metal feedline pillars, a second packaging layer covering the second metal feedline pillars except exposing the top surfaces of the second metal feedline pillars; a third antenna layer disposed on the second packaging layer, semiconductor chips connected to the rewiring layer, a metal bump disposed inside an opening in the rewiring layer, and a third packaging layer encapsulating the semiconductor chips and the metal bump.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: April 26, 2022
    Assignee: SJ SEMICONDUCTOR (JIANGYIN) CORPORATION
    Inventors: Chengtar Wu, Yenheng Chen, Chengchung Lin, Yayuan Xue, Han Xu
  • Publication number: 20210391637
    Abstract: The present disclosure provides an antenna packaging structure and a method for forming the same. The structure includes: a supporting substrate, a rewiring layer on the supporting substrate, a first antenna layer disposed on the rewiring layer, first metal feedline pillars disposed on the first antenna layer, a first packaging layer covering the first metal feedline pillars except exposing the top surfaces of the first metal feedline pillars; a second antenna layer on the first packaging layer, second metal feedline pillars, a second packaging layer covering the second metal feedline pillars except exposing the top surfaces of the second metal feedline pillars; a third antenna layer disposed on the second packaging layer, semiconductor chips connected to the rewiring layer, a metal bump disposed inside an opening in the rewiring layer, and a third packaging layer encapsulating the semiconductor chips and the metal bump.
    Type: Application
    Filed: December 23, 2020
    Publication date: December 16, 2021
    Inventors: Chengtar WU, Yenheng CHEN, Chengchung LIN, Yayuan XUE, Han XU