Patents by Inventor Ye Fu

Ye Fu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240061565
    Abstract: A method and an apparatus for generating an image processing interface, a device, and a storage medium, including: receiving a first instruction, where the first instruction is used to characterize an image parameter of a target image; determining an image template corresponding to the first instruction, where the image template is used to characterize a processing flow of the target image; and generating a processing interface of the target image according to the image template. Since the image template standardizes the process and steps of image processing, the specific operation steps for generating an image processing interface are simplified, while standardizing the generated image processing interface, reducing the using and maintenance cost of the image processing interface, and improving the security of the image processing interface.
    Type: Application
    Filed: December 1, 2021
    Publication date: February 22, 2024
    Inventors: Qiang ZHOU, Gang LIU, Xiping ZHANG, Ye FU, Zhanpeng LI, Qin XIAO
  • Patent number: 11082041
    Abstract: A switching circuit includes a live wire power obtaining circuit, a control circuit, and a tunable capacitor array. The live wire power obtaining circuit is coupled to a live wire to receive an alternating current (AC) voltage. The control circuit is configured to perform a zero-crossing detection to the alternating current voltage. The tunable capacitor array is coupled to the live wire power obtaining circuit and the control circuit. The control circuit is configured to control the live wire power obtaining circuit to supply power to the control circuit or the tunable capacitor array to discharge to supply power to the control circuit based on a state of a first switch and a zero-crossing detection result.
    Type: Grant
    Filed: December 3, 2019
    Date of Patent: August 3, 2021
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Hu-Ye Fu, Zuo-Hui Peng, Feng-Qiao Ye, Jian Wang, Yu-Xiang Qi
  • Publication number: 20200412358
    Abstract: A switching circuit includes a live wire power obtaining circuit, a control circuit, and a tunable capacitor array. The live wire power obtaining circuit is coupled to a live wire to receive an alternating current (AC) voltage. The control circuit is configured to perform a zero-crossing detection to the alternating current voltage. The tunable capacitor array is coupled to the live wire power obtaining circuit and the control circuit. The control circuit is configured to control the live wire power obtaining circuit to supply power to the control circuit or the tunable capacitor array to discharge to supply power to the control circuit based on a state of a first switch and a zero-crossing detection result.
    Type: Application
    Filed: December 3, 2019
    Publication date: December 31, 2020
    Inventors: Hu-Ye FU, Zuo-Hui PENG, Feng-Qiao YE, Jian WANG, Yu-Xiang QI
  • Patent number: 6650947
    Abstract: A multivariable analysis tool is provided wherein an orthogonal decomposition method such as a Partial Least Squares algorithm is applied to a disturbance model, which relates the known loop disturbances to the loop model residue. The tool according to the invention first extracts the most dominant correlation to the loop model residue and then uses the residue to search for secondary dominant correlation in an orthogonal space, and repeats this process until no further output variation can be significantly attributed by the next dominant correlation. In this way, the analysis tool of the present invention is able to estimate the performance potential of each control loop under different disturbance conditions and provide a control performance index by comparing the achieved performance to the performance potential in a multi-variable environment. This index indicates whether or not a given loop is under optimal operation and shows variance of the loop from the best achievable loop performance.
    Type: Grant
    Filed: March 23, 2001
    Date of Patent: November 18, 2003
    Assignee: Metso Automation Oy
    Inventors: Ye Fu, Seyhan Nuyan
  • Publication number: 20020177909
    Abstract: A multivariable analysis tool is provided wherein an orthogonal decomposition method such as a Partial Least Squares algorithm is applied to a disturbance model, which relates the known loop disturbances to the loop model residue. The tool according to the invention first extracts the most dominant correlation to the loop model residue and then uses the residue to search for secondary dominant correlation in an orthogonal space, and repeats this process until no further output variation can be significantly attributed by the next dominant correlation. In this way, the analysis tool of the present invention is able to estimate the performance potential of each control loop under different disturbance conditions and provide a control performance index by comparing the achieved performance to the performance potential in a multi-variable environment. This index indicates whether or not a given loop is under optimal operation and shows variance of the loop from the best achievable loop performance.
    Type: Application
    Filed: March 23, 2001
    Publication date: November 28, 2002
    Inventors: Ye Fu, Seyhan Nuyan