Abstract: Embodiments of this application disclose a communication method and apparatus. Therefore, a beam gain of downlink channel transmission is improved, and a phase mismatch performance loss is small. The method in embodiments of this application includes: A network device may determine a first downlink statistical autocorrelation matrix of a downlink channel based on a first uplink statistical autocorrelation matrix of an uplink channel, indicate, based on a first weight indicated by a terminal, the terminal to receive a second weight of data, then determine a third weight different from the second weight based on the first downlink statistical autocorrelation matrix and the second weight, and send the data to the terminal based on the third weight.

Abstract: An induced earthquake evaluation method for hydraulic fracturing activated faults includes obtaining an induced earthquake evaluation unit, cumulative injection equivalent energy, induced earthquake probability of fault type, induced earthquake probability of fault distance, hydraulic fracturing fluid diffusion capacity in fractured formation, new effective fault stress after fracturing, formation fluid pressure change rate and cumulative released equivalent energy. The probability of induced earthquake by hydraulic fracturing can be obtained. The induced earthquake possibility of each evaluation unit or single well under different stages of hydraulic fracturing, different construction injection methods and production conditions can be quantitatively evaluated. The method provides a quantitative result that can provide data support for optimizing hydraulic fracturing and reducing induced earthquake hazards.

Abstract: The present invention relates to a ?LED light-emitting and display device without electrical contact, external carrier injection and mass transfer and a preparation method thereof. The ?LED light-emitting and display device includes one or more light-emitting pixels, and each light-emitting pixel includes a pixel lower electrode, a lower insulation layer, a ?LED chip, an upper insulation layer and a pixel upper electrode from bottom to top, wherein the upper insulation layer and the lower insulation layer prevent the ?LED chip from being in direct electrical contact with the pixel lower electrode and the pixel upper electrode, and the ?LED chip is lit by an alternating electric field through electromagnetic coupling.

Abstract: Provided is a use of Wee1 kinase inhibitors in the treatment of cancer. In particular, provided is a use of Wee1 kinase inhibitors in the preparation of drugs for the treatment of cancers with Histone H3K27M mutation.

Abstract: A heat dissipation device includes a first radiator, a second radiator, and a first connecting device. The first radiator and second radiator are fastened onto a printed circuit board (PCB) by the first connecting device. The first radiator is over a first electronic device, and the second radiator is over a second electronic device. The first connecting device includes a first fixing pipe, a first fixing post and a first elastic element. The first radiator is fixed with the first fixing pipe, the first fixing post is sleeved in the first fixing pipe, an upper surface of the first fixing pipe abuts against a lower surface of a first convex portion of the first fixing post, a lower surface of the first fixing pipe abuts against an upper surface of the PCB, and the first fixing post extends through the second radiator and the first radiator from top to bottom.

Abstract: A detection circuit, a detection method, and an electronic system for detecting an I/O output status are provided. The detection circuit includes a comparison-window generating circuit configured to: detect an I/O data signal, generate a first single pulse signal, determining a first-time window, in response to a rising edge of the I/O data signal, and generate a second single pulse signal, determining a second-time window, in response to a falling edge of the I/O data signal. A first comparison circuit is configured to: receive the first single pulse signal, and compare the I/O drive signal with a preset high-level reference signal within the first time window to obtain a first comparison result. The second comparison circuit is configured to: receive the second single pulse signal, and compare the I/O drive signal with a preset low-level reference signal within the second time window to obtain a second comparison result.

Abstract: A crystal oscillator circuit is provided. The crystal oscillator circuit includes an oscillator start-up circuit having a first output terminal and a second output terminal, where the second output terminal outputs a first oscillation signal; and a waveform conversion circuit configured to convert the first oscillation signal to a rectangular wave signal. The crystal oscillator circuit also includes a first current source configured to output a first current to drive the oscillator start-up circuit; and a second current source configured to output a second current, and being connected in parallel with the first current source to jointly drive the oscillator start-up circuit. Further the crystal oscillator circuit includes a pulse generation circuit configured to generate a control pulse signal to control the second current source to output the second current after power on and to stop outputting the second current after a preset time.

Abstract: Detection circuit, detection method, and electronic system for detecting an I/O output status are provided. The detection circuit includes a comparison-window generating circuit configured to: detect an I/O data signal, generate a first single pulse signal, determining a first-time window, in response to a rising edge of the I/O data signal, and generate a second single pulse signal, determining a second-time window, in response to a falling edge of the I/O data signal. A first comparison circuit is configured to: receive the first single pulse signal, and compare the I/O drive signal with a preset high-level reference signal within the first time window to obtain a first comparison result. The second comparison circuit is configured to: receive the second single pulse signal, and compare the I/O drive signal with a preset low-level reference signal within the second time window to obtain a second comparison result.

Abstract: A bus contention detection circuit includes a delay unit having an input terminal for receiving an output signal of an I/O driver, a duty cycle adjustment unit connected to the delay unit, and a comparison unit having a first input terminal for receiving the output signal, a second terminal for receiving a reference voltage, and an enable terminal for receiving an enable signal of the duty cycle adjustment unit. The enable signal has a rising edge that is delayed relative to a rising edge of the output signal and a falling edge that is aligned with a falling edge of the output signal. The comparison unit compares a voltage level of the output signal with the reference voltage when the enable signal is in a stable voltage state and determine a bus condition in response to a comparison result.

Abstract: A bus contention detection circuit includes a delay unit having an input terminal for receiving an output signal of an I/O driver, a duty cycle adjustment unit connected to the delay unit, and a comparison unit having a first input terminal for receiving the output signal, a second terminal for receiving a reference voltage, and an enable terminal for receiving an enable signal of the duty cycle adjustment unit. The enable signal has a rising edge that is delayed relative to a rising edge of the output signal and a falling edge that is aligned with a falling edge of the output signal. The comparison unit compares a voltage level of the output signal with the reference voltage when the enable signal is in a stable voltage state and determine a bus condition in response to a comparison result.

Abstract: A crystal oscillator circuit is provided. The crystal oscillator circuit includes an oscillator start-up circuit having a first output terminal and a second output terminal, where the second output terminal outputs a first oscillation signal; and a waveform conversion circuit configured to convert the first oscillation signal to a rectangular wave signal. The crystal oscillator circuit also includes a first current source configured to output a first current to drive the oscillator start-up circuit; and a second current source configured to output a second current, and being connected in parallel with the first current source to jointly drive the oscillator start-up circuit. Further the crystal oscillator circuit includes a pulse generation circuit configured to generate a control pulse signal to control the second current source to output the second current after power on and to stop outputting the second current after a preset time.

Abstract: A method and system for automatic zoom adjustment is disclosed. Content is displayed on a display screen for a user. In an auto-zoom mode, a first and a second pictures are acquired. Pre-determined features are detected from the first and second pictures. A first and a second feature distances are computed based on the pre-determined features detected from the first and second pictures, respectively. The first and second feature distances relate to the user's head movement relative to the display screen. An adjustment to the zoom of the content on display is determined based on the difference between the first and the second feature distances.

Abstract: A mounting apparatus for mounting a motherboard (30) having several first mounting holes (33) includes a chassis (10), a fixing member (70), and a supporting tray (50). The chassis comprised a post (24) protruding from a bottom wall (12) thereof, and a number of standoffs (18) received in first the mounting hole. The fixing member is slidably mounted to the post, and includes an engaging portion (82) protruding from a lower portion thereof. The supporting tray is attached to the motherboard, and includes a slice (66) projecting from a side portion thereof. When the engaging portion of fixing member engages with the slice of supporting tray, the motherboard is in a locked state; when the engaging portion of fixing member disengages from the slice of supporting tray, the motherboard is in an unlocked state.

Abstract: A mounting apparatus for mounting a motherboard (30) having several first mounting holes (33) includes a chassis (10), a fixing member (70), and a supporting tray (50). The chassis comprised a post (24) protruding from a bottom wall (12) thereof and a number of standoffs (18) received in first the mounting hole. The fixing member is slidably mounted to the post, and includes an engaging portion (82) protruding from a lower portion thereof. The supporting tray is attached to the motherboard, and includes a slice (66) projecting from a side portion thereof. When the engaging portion of fixing member engages with the slice of supporting tray, the motherboard is in a locked state; when the engaging portion of fixing member disengages from the slice of supporting tray, the motherboard is in an unlocked state.