Patents by Inventor Ye Shao
Ye Shao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240237763Abstract: A reusable protective clothing includes a one-piece protective suit which includes integrated top and trousers attached with gloves and shoe covers, and a protective headpiece having a face shield. A front side of the protective headpiece is provided with a full-vision goggle with 180-degree field of view, the full-vision goggle is integrated with the face shield, a back side of the protective headpiece is provided with a protective hood made of a material of the one-piece protective suit, the protective hood is integrated with the top, the front side of the protective headpiece is provided with an air vent for a mouth and a nose configured according to facial features of a wearer, and an outer side of the protective headpiece is provided with ear-shaped hooks. The protective clothing is designed according to application environment and medical requirements to prevent exposure to pathogenic microorganisms.Type: ApplicationFiled: December 7, 2022Publication date: July 18, 2024Inventors: LEI ZHANG, YUZHANG SHAO, DEAN ZHAO, YE LI, LEJI WEN, XIN LIN
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Patent number: 11626317Abstract: A semiconductor device has a first trench and a second trench of a trench structure located in a substrate. The second trench is separated from the first trench by a trench space that is less than a first trench width of the first trench and less than a second trench width of the second trench. The trench structure includes a doped sheath having a first conductivity type, contacting and laterally surrounding the first trench and the second trench. The doped sheath extends from the top surface to an isolation layer and from the first trench to the second trench across the trench space. The semiconductor device includes a first region and a second region, both located in the semiconductor layer, having a second, opposite, conductivity type. The first region and the second region are separated by the first trench, the second trench, and the doped sheath.Type: GrantFiled: October 24, 2020Date of Patent: April 11, 2023Assignee: Texas Instruments IncorporatedInventors: Binghua Hu, Ye Shao, John K Arch
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Patent number: 11587864Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.Type: GrantFiled: December 2, 2021Date of Patent: February 21, 2023Assignee: Texas Instruments IncorporatedInventors: Poornika Fernandes, Ye Shao, Guruvayurappan S. Mathur, John K. Arch, Paul Stulik
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Publication number: 20220348913Abstract: The present disclosure discloses a method for identifying a M1 generation plant mutant resulting from physical and chemical mutagenesis, a method for acquiring the plant mutant, a mutant gene, and use thereof. The method for identifying a M1 generation plant mutant resulting from physical and chemical mutagenesis includes: mutagenizing a plant to obtain an M1 generation plant mutant, extracting a mixed pool of DNA from the obtained M1 generation plant mutant, subjecting the mixed pool of DNA to high-depth targeted sequencing for a target gene region, and aligning a sequencing result with the target gene region to identify whether there are target single nucleotide polymorphisms (SNPs) and/or Indel. The method of the present disclosure has high efficiency and high accuracy, involves simple operations, and is of progressive significance for the identification and acquisition of innovative germplasms.Type: ApplicationFiled: June 2, 2022Publication date: November 3, 2022Inventors: Bingran Zhao, Ye Shao, Bigang Mao, Li Tang, Yan Peng, Yuanyi Hu, Wenjian Li, Lixia Yu, Yan Du, Yaokui Li, Dan Zhang, Lianyang Bai, Longping Yuan
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Publication number: 20220130717Abstract: A semiconductor device has a first trench and a second trench of a trench structure located in a substrate. The second trench is separated from the first trench by a trench space that is less than a first trench width of the first trench and less than a second trench width of the second trench. The trench structure includes a doped sheath having a first conductivity type, contacting and laterally surrounding the first trench and the second trench. The doped sheath extends from the top surface to an isolation layer and from the first trench to the second trench across the trench space. The semiconductor device includes a first region and a second region, both located in the semiconductor layer, having a second, opposite, conductivity type. The first region and the second region are separated by the first trench, the second trench, and the doped sheath.Type: ApplicationFiled: October 24, 2020Publication date: April 28, 2022Applicant: Texas Instruments IncorporatedInventors: Binghua Hu, Ye Shao, John K Arch
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Publication number: 20220093507Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.Type: ApplicationFiled: December 2, 2021Publication date: March 24, 2022Inventors: Poornika FERNANDES, Ye SHAO, Guruvayurappan S. MATHUR, John K. ARCH, Paul STULIK
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Patent number: 11222841Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.Type: GrantFiled: September 5, 2019Date of Patent: January 11, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Poornika Fernandes, Ye Shao, Guruvayurappan S. Mathur, John K. Arch, Paul Stulik
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Publication number: 20210351269Abstract: A semiconductor device has a deep trench in a semiconductor substrate of the semiconductor device, with linear trench segments extending to a trench intersection. Adjacent linear trench segments are connected by connector trench segments that surround a substrate pillar in the trench intersection. Each connector trench segment has a width at least as great as widths of the linear trench segments connected by the connector trench segment. The deep trench includes a trench filler material. The deep trench may have three linear trench segments extending to the trench intersection, connected by three connector trench segments, or may have four linear trench segments extending to the trench intersection, connected by four connector trench segments.Type: ApplicationFiled: July 20, 2021Publication date: November 11, 2021Inventors: Binghua Hu, Ye Shao, John K Arch
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Patent number: 11101342Abstract: A semiconductor device has a deep trench in a semiconductor substrate of the semiconductor device, with linear trench segments extending to a trench intersection. Adjacent linear trench segments are connected by connector trench segments that surround a substrate pillar in the trench intersection. Each connector trench segment has a width at least as great as widths of the linear trench segments connected by the connector trench segment. The deep trench includes a trench filler material. The deep trench may have three linear trench segments extending to the trench intersection, connected by three connector trench segments, or may have four linear trench segments extending to the trench intersection, connected by four connector trench segments.Type: GrantFiled: February 10, 2020Date of Patent: August 24, 2021Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Binghua Hu, Ye Shao, John K Arch
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Publication number: 20210249505Abstract: A semiconductor device has a deep trench in a semiconductor substrate of the semiconductor device, with linear trench segments extending to a trench intersection. Adjacent linear trench segments are connected by connector trench segments that surround a substrate pillar in the trench intersection. Each connector trench segment has a width at least as great as widths of the linear trench segments connected by the connector trench segment. The deep trench includes a trench filler material. The deep trench may have three linear trench segments extending to the trench intersection, connected by three connector trench segments, or may have four linear trench segments extending to the trench intersection, connected by four connector trench segments.Type: ApplicationFiled: February 10, 2020Publication date: August 12, 2021Applicant: Texas Instruments IncorporatedInventors: Binghua Hu, Ye Shao, John K Arch
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Publication number: 20210074629Abstract: An integrated circuit (IC) includes a substrate and a first capacitor on the substrate. The first capacitor has a first width. A first dielectric layer is provided on a side of the first capacitor opposite the substrate. Further, a second capacitor is present on a side of the first dielectric layer opposite the first capacitor. The second capacitor has a second width that is smaller than the first width. The IC also has a second dielectric layer and a first metal layer. The second dielectric layer is on a side of the second capacitor opposite the first dielectric layer. The first metal layer is on a side of the second dielectric layer opposite the second capacitor.Type: ApplicationFiled: September 5, 2019Publication date: March 11, 2021Inventors: Poornika FERNANDES, Ye SHAO, Guruvayurappan S. MATHUR, John K. ARCH, Paul STULIK
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Patent number: 10840322Abstract: An integrated circuit (IC) includes a substrate with a semiconductor surface layer including functional circuitry having a plurality of interconnected transistors including a dielectric layer thereon with a metal stack including a plurality of metal levels over the dielectric layer. A thin film resistor (TFR) layer including at least one metal is within the metal stack. At least one capacitor is within the metal stack including a capacitor dielectric layer over a metal bottom plate formed from one of the metal levels. The capacitor top plate is formed from the TFR layer on the capacitor dielectric layer and there is at least one resistor lateral to the capacitor formed from the same TFR layer.Type: GrantFiled: March 29, 2018Date of Patent: November 17, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Dhishan Kande, Ye Shao, David Curran
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Publication number: 20190305074Abstract: An integrated circuit (IC) includes a substrate with a semiconductor surface layer including functional circuitry having a plurality of interconnected transistors including a dielectric layer thereon with a metal stack including a plurality of metal levels over the dielectric layer. A thin film resistor (TFR) layer including at least one metal is within the metal stack. At least one capacitor is within the metal stack including a capacitor dielectric layer over a metal bottom plate formed from one of the metal levels. The capacitor top plate is formed from the TFR layer on the capacitor dielectric layer and there is at least one resistor lateral to the capacitor formed from the same TFR layer.Type: ApplicationFiled: March 29, 2018Publication date: October 3, 2019Inventors: Dhishan Kande, Ye Shao, David Curran
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Publication number: 20190106881Abstract: A light gauge steel joist basic structure system of a light partition wall is disclosed, comprising: top and ground joists and vertical joists. The top and ground joists comprise a ground joist and a top joist. The vertical joist is provided between the top and ground joists by means of a first connection member. The vertical joist and the vertical joist are fixedly connected to each other by means of the first connection member and/or a second connection member. V-shaped slots are symmetrically provided on two side walls of the top and ground joists. The V-shaped slots are provided on the side walls and the bottoms of the vertical joists. A construction method for a light gauge steel joist basic structure of a light partition wall is also disclosed. The light gauge steel joist basic structure system is simple and fast to be constructed and has desirable flatness.Type: ApplicationFiled: October 31, 2016Publication date: April 11, 2019Applicants: DONCCUAN VANKE BUILDING TECHNIQUE RESEARCH CO., LTD., BEIJING JUMPSUN NEW TECHNOLOGY CO., LTD.Inventors: Yu Shi, Cheng Huang, Jiangping Sun, Ye Shao, Shuangxi Tian