Abstract: Memory systems and methods for operating the same. A memory system comprises a first memory, a second memory having an operating speed different from that of the first memory, a storage unit configured to store an instruction, a prefetcher configured to update prefetcher data in response to occurrence of cache hits and a processor configured to execute the instruction stored in the storage unit. When the instruction is executed, the processor is configured to generate prefetcher friendly data by filtering the prefetcher data, set a prefetcher friendly bit in a first pointer area corresponding to the first memory and a second pointer area corresponding to the second memory based on the prefetcher friendly data, and determine whether data of the first pointer area and the second pointer area are migrated, in consideration of a reference bit and the prefetcher friendly bit of the first and second pointer areas.