Abstract: A diode includes a semiconductor substrate of first conductivity type and including a surface having a doped portion of second conductivity type opposite the first conductivity type. In addition, a dielectric layer on the surface of the substrate extends over a first portion of the doped surface portion and leaves a second portion of the doped surface portion exposed. This dielectric layer includes a low-angle tapered portion having a thickness which increases as said tapered portion extends from the exposed doped surface portion of the substrate. In particular, the low-angle tapered portion of the dielectric layer may extend from the exposed portion of a surface at an angle of less than about 10.degree.. Furthermore, the diode may also include a conductive contact on the exposed portion of the substrate and a field plate extending from the conductive contact over a portion of the dielectric layer.

Abstract: A method of forming an insulated gate semiconductor device includes the steps of patterning an insulated gate electrode on a face of a substrate containing a first conductivity type region and forming a trench at the face using the gate electrode as a mask. Second conductivity type dopants are then deposited onto the bottom and sidewalls of the trench and diffused into the substrate to form a relatively lightly doped first body region. The gate electrode is then used again as a mask during a step of implanting a relatively high dose of second conductivity type dopants at the bottom of the trench. These implanted dopants are then partially diffused laterally and downwardly away from the bottom and sidewalls of the trench. The gate electrode is then used again to deposit first conductivity type dopants onto the sidewalls (and bottom) of the trench.

Abstract: A hybrid schottky injection field effect transistor is provided. A first diffusion region of a second conductivity type and a second diffusion region of a first conductivity type are separately formed at a main surface of a silicon layer. A third diffusion region of a first conductivity type is formed within the first diffusion region. An insulating layer covers part of the second diffusion region and the third diffusion region. A gate electrode is formed on the insulating layer and is situated over the first and third diffusion regions and the silicon layer. A cathode electrode is commonly connected to the third diffusion region and the first diffusion region. An anode electrode comprises a trench filled with electrode material and is formed in the silicon layer along side of the second diffusion area and a gate insulating layer.

Abstract: A shorted anode lateral insulated gate bipolar transistor includes a semiconductor layer of a first conductivity type, a first current electrode, a second current electrode, a first insulation layer, a first gate electrode, a second gate electrode, a first high concentration impurity region of a second conductivity type, a low concentration impurity region of the second conductivity type, a first high concentration impurity region of the first conductivity type, a second high concentration impurity region of the second conductivity type, a third high concentration impurity region of the second conductivity type, and a second high concentration impurity region of the first conductivity type.