Patents by Inventor Yeau-Kuen Fang

Yeau-Kuen Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6072201
    Abstract: An amorphous silicon based hole-injection type "Separate Absorption and Multiplication Avalanche Photodiode" ("SAMAPD") has been invented. The device was made by separating an absorption layer and an avalanche layer from a conventional APD (Avalanche Photodiode). This will make a majority of an voltage bias to go across on the avalanche layer (i.e., a high energy bandgap material) and to enlarge an avalanche multiplication effect (i.e., increasing optical gains). In addition, the voltage bias goes across on the absorption layer will be sufficiently small to reduce a dark current. Using an i-a-Si:H material as the avalanche layer material and an i-a-Si.sub.1-x :Ge.sub.x :H material as the absorption layer material, the hole-injection type SAMPAD yields a very high gain, i.e., 686, at a reverse bias of 16V under an incident light power of P.sub.in =1 .mu.w. The product of this invention is very suitable for use in a long distance optical communication.
    Type: Grant
    Filed: January 6, 1999
    Date of Patent: June 6, 2000
    Assignee: National Science Counsel
    Inventors: Yeau-Kuen Fang, Kuen-Hsien Lee, Gun-Yuan Lee
  • Patent number: 5965270
    Abstract: An amorphous-silicone-based antifuse structure has been invented for VLSI (Very Large Scale Integration circuits) FPGA's (Fields Programmable Gate Array) applications. The structure comprises from top to bottom a first Al layer/a first i-a-SiC:H layer/an i-a-SiH layer/a second i-a-SiC:H layer/a second Al layer, which is basically a MIM (Metal/Insulator/Metal) structure. The MIM structure offers such major advantages as simple for preparation and low in cost. Due to use of the Al layer as an electrode metal and use of a PECVD system for the preparation of the amorphous silicon materials, the antifuse structure is compatible with that of general VLSI devices. In addition, due to a difference in the thickness of barrier enhancement layers in the first and the second i-a-SiC:H layer, a programmed voltage can be adjusted easily and applied in many fields. This structure has a very low on-resistance as the antifuse structure breakdown. The anitifuse has a high resistance (i.e.
    Type: Grant
    Filed: July 19, 1996
    Date of Patent: October 12, 1999
    Assignee: National Science Council
    Inventors: Yeau-Kuen Fang, Kuen-Hsien Lee