Patents by Inventor Yee Ling Cheung
Yee Ling Cheung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9756699Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). If desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.Type: GrantFiled: August 29, 2014Date of Patent: September 5, 2017Assignee: Avago Technologies General IP (Singapore) Pte. LtdInventors: Todd Lee Brooks, Xicheng Jiang, Iuri Mehr, David Joseph Stoops, Vinod Jayakumar, Min Gyu Kim, Hui Zheng, I-Ning Ku, Vinay Chandrasekhar, Yee Ling Cheung
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Patent number: 9413375Abstract: A CMOS analog and audio front-end circuit includes an enhanced analog-to-digital converter (ADC) that achieves a desired signal-to-noise-and-distortion (SNDR) and an analog-front-end transmit (TX) digital-to-analog converter (DAC). The enhanced ADC includes an improved single Op-Amp resonator coupled to a feed-forward loop and can substantially reduce signal transfer function (STF) peaking of the enhanced ADC. The CMOS analog and audio front-end circuit is integrated with a baseband processor.Type: GrantFiled: December 30, 2014Date of Patent: August 9, 2016Assignee: Broadcom CorporationInventors: Xicheng Jiang, Xinyu Yu, Fang Lin, Yee Ling Cheung, Michael Inerfield
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Publication number: 20150194979Abstract: A CMOS analog and audio front-end circuit includes an enhanced analog-to-digital converter (ADC) that achieves a desired signal-to-noise-and-distortion (SNDR) and an analog-front-end transmit (TX) digital-to-analog converter (DAC). The enhanced ADC includes an improved single Op-Amp resonator coupled to a feed-forward loop and can substantially reduce signal transfer function (STF) peaking of the enhanced ADC. The CMOS analog and audio front-end circuit is integrated with a baseband processor.Type: ApplicationFiled: December 30, 2014Publication date: July 9, 2015Inventors: Xicheng JIANG, Xinyu YU, Fang LIN, Yee Ling CHEUNG, Michael INERFIELD
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Publication number: 20150066438Abstract: A sensor interface includes on-chip relaxation oscillator circuit and a PLL that operate cooperatively to generate a highly accurate clock signal on-chip using low-power components. A photodiode generates a current signal based on an optical signal that is representative of a sensor signal. An ADC that operates based on the highly accurate clock signal generates a digital signal based on the current signal generated by the photodiode, and a processor processed the digital signal to estimate sensor data within the sensor signal. Examples of characteristics that may be sensed can include environmental characteristics (e.g., temperature, humidity, barometric pressure, etc.) and/or biomedical characteristics (e.g., body temperature, heart rate, respiratory rate, blood pressure, etc.). In desired, an amplifier processes the photodiode-provided current signal before it is provided to the ADC. Also, one or more CDACs that generate feedback currents may be used to reduce noise sensitivity of the sensor interface.Type: ApplicationFiled: August 29, 2014Publication date: March 5, 2015Applicant: BROADCOM CORPORATIONInventors: Todd Lee Brooks, Xicheng Jiang, Iuri Mehr, David Joseph Stoops, Vinod Jayakumar, Min Gyu Kim, Hui Zheng, I-Ning Ku, Vinay Chandrasekhar, Yee Ling Cheung
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Patent number: 8452428Abstract: Aspects of a method and system for detecting and identifying electronic accessories or peripherals utilizing a hardware audio CODEC are provided. In this regard, a hardware audio CODEC may be operable to compare one or more voltages on one or more biased pins of an accessory or peripheral port to one or more reference voltages and generate one or more digital representations of the one or more voltages on the biased one or more pins. An accessory or peripheral attached to the accessory or peripheral port may be identified based on the comparison and/or the generated one or more digital representations. The one or more bias voltages may be controlled based on a result of the comparison and/or the generated digital representations. The one or more bias voltages may be reduced after an attached accessory or peripheral has been identified.Type: GrantFiled: November 10, 2008Date of Patent: May 28, 2013Assignee: Broadcom CorporationInventors: Hongwei Kong, Nelson Sollenberger, Todd L. Brooks, Yee Ling Cheung, Xicheng Jiang
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Patent number: 8401502Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.Type: GrantFiled: August 5, 2009Date of Patent: March 19, 2013Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
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Publication number: 20100117685Abstract: Aspects of a method and system for detecting and identifying electronic accessories or peripherals utilizing a hardware audio CODEC are provided. In this regard, a hardware audio CODEC may be operable to compare one or more voltages on one or more biased pins of an accessory or peripheral port to one or more reference voltages and generate one or more digital representations of the one or more voltages on the biased one or more pins. An accessory or peripheral attached to the accessory or peripheral port may be identified based on the comparison and/or the generated one or more digital representations. The one or more bias voltages may be controlled based on a result of the comparison and/or the generated digital representations. The one or more bias voltages may be reduced after an attached accessory or peripheral has been identified.Type: ApplicationFiled: November 10, 2008Publication date: May 13, 2010Inventors: Hongwei Kong, Nelson Sollenberger, Todd L. Brooks, Yee Ling Cheung, Xicheng Jiang
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Publication number: 20100080271Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.Type: ApplicationFiled: August 5, 2009Publication date: April 1, 2010Applicant: Broadcom CorporationInventors: Yee Ling CHEUNG, Kevin T. Chan, Jan Mulder
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Patent number: 7589655Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell.Type: GrantFiled: September 4, 2008Date of Patent: September 15, 2009Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
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Patent number: 7587181Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The transmitter includes a plurality of current cells. Each cell is configurable for operating in different modes. The method includes determining a first probability associated with transmitting data at a particular symbolic level and determining a second probability associated with each cell being used during a transmission at the particular symbolic level. Next, one of the modes for each cell is selected in accordance with anticipated performance requirements. An average current of the transmitter is then calculated based upon the determined first and second probabilities and the selected modes.Type: GrantFiled: November 12, 2004Date of Patent: September 8, 2009Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
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Patent number: 7557640Abstract: A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register.Type: GrantFiled: October 25, 2006Date of Patent: July 7, 2009Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Chun-Ying Chen
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Publication number: 20090121910Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell.Type: ApplicationFiled: September 4, 2008Publication date: May 14, 2009Applicant: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
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Patent number: 7423569Abstract: Provided is a method and system for controlling current characteristics in a transceiver having a transmitter. The method includes identifying a phase control signal from an adjacent current cell preceding the particular current cell in time and logically ORing the phase control signal from the preceding cell with a phase control signal from the particular current cell.Type: GrantFiled: April 24, 2006Date of Patent: September 9, 2008Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Jan Mulder
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Patent number: 7161781Abstract: A signal driving system generates an output swinging between a first power supply (e.g., about 1.2 Volts), powering first and second drivers, and a second power supply (e.g., about 3.3 Volts), powering a first current mirror. The second power supply is generated external to the signal driving system and is used to allow for a desired common-mode differential output signal range. However, the second power supply produces voltage at a level above a rating of the devices in the signal driving system. Therefore, protection devices are used to protect the elements of the signal driving system from the second power supply. Accordingly, through use of the signal driving system of the present invention, a high voltage current mode driver can operate in a low voltage process without damaging the devices in the signal driving system.Type: GrantFiled: September 12, 2003Date of Patent: January 9, 2007Assignee: Broadcom CorporationInventors: Josephus A. E. P. van Engelen, Yee Ling Cheung, Mark J Chambers, Darwin Cheung
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Patent number: 7142039Abstract: A charge pump includes a resistor divider connected between an output voltage node and ground and a comparator inputting a reference voltage at one input, and a divided voltage from the resistor divider at another input. A digital control circuit is enabled by the comparator. A first transistor and a second transistor are in series between an input voltage node and the ground, both transistors controlled by the digital control circuit. A pump capacitor is connected between to the output voltage node and between the first and second transistor, and being charged by turning the first and second transistors on and off. A first diode is between the pump capacitor and the input voltage node. A second diode between the pump capacitor and the output voltage node. A reservoir capacitor between the output voltage node and ground. The digital control circuit comprises a first shift register.Type: GrantFiled: February 27, 2004Date of Patent: November 28, 2006Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Chun-Ying Chen
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Patent number: 6867621Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.Type: GrantFiled: November 25, 2003Date of Patent: March 15, 2005Assignee: Broadcom CorporationInventors: Jan Mulder, Yee Ling Cheung
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Publication number: 20040140830Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.Type: ApplicationFiled: November 25, 2003Publication date: July 22, 2004Applicant: Broadcom CorporationInventors: Jan Mulder, Yee Ling Cheung
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Patent number: 6720798Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.Type: GrantFiled: May 31, 2002Date of Patent: April 13, 2004Assignee: Broadcom CorporationInventors: Jan Mulder, Yee Ling Cheung
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Patent number: 6538508Abstract: A programmable gain amplifier (PGA) has an amplifier and a variable resistor that is connected to the output of the amplifier. The variable resistor includes a resistor that is connected to a reference voltage and multiple parallel taps that tap off the resistor. A two-stage switch network having fine stage switches and coarse stage switches connects the resistor taps to an output node of the PGA. The taps and corresponding fine stage switches are arranged into two or more groups, where each group has n-number of fine stage switches and corresponding taps. One terminal of each fine stage switch is connected to the corresponding resistor tap, and the other terminal is connected to an output terminal for the corresponding group. The coarse stage switches select from among the groups of fine stage switches, and connect to the output of the PGA.Type: GrantFiled: October 4, 2001Date of Patent: March 25, 2003Assignee: Broadcom CorporationInventors: Yee Ling Cheung, Kevin T. Chan, Siavash Fallahi
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Publication number: 20030038740Abstract: A differential line driver includes first, second, third and fourth cascode transistors connected in parallel, wherein drains of the first and third transistors are connected to a negative output of the differential line driver, and wherein drains of the second and fourth transistors are connected to a positive output of the differential line driver. First, second, third and fourth switching transistors are connected in series with corresponding first, second, third and fourth cascode transistors and driven by a data signal. First and second compound transistors inputting a class AB operation signal at their gates, wherein the first compound transistor is connected to sources of the first and second switching transistors, and wherein the second compound transistor is connected to sources of the third and fourth switching transistors.Type: ApplicationFiled: May 31, 2002Publication date: February 27, 2003Inventors: Jan Mulder, Yee Ling Cheung