Patents by Inventor Yee Na Shin

Yee Na Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140374870
    Abstract: Disclosed herein are an image sensor module and a method of manufacturing the same. The image sensor includes: a base substrate having an image sensor mounted groove including a first groove and a second groove having a stepped shape; and an image sensor mounted in a groove of the base substrate.
    Type: Application
    Filed: January 31, 2014
    Publication date: December 25, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyung Ho Lee, Suk Jin Ham, Seung Wan Woo, Yee Na Shin
  • Publication number: 20140321084
    Abstract: Disclosed herein are a printed circuit board including an electronic component embedded therein and a method for manufacturing the same. The printed circuit board including an electronic component embedded therein includes: a core formed with a cavity which is formed of a through hole and has a side wall formed with an inclined surface having a top and bottom symmetrically formed based on a central portion thereof; an electronic component embedded in the cavity; insulating layers stacked on upper and lower portions of the core including the electronic component; and external circuit layers formed on the insulating layers.
    Type: Application
    Filed: October 23, 2013
    Publication date: October 30, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Seung Eun LEE, Yul Kyo CHUNG, Yee Na SHIN, Doo Hwan LEE
  • Publication number: 20140182911
    Abstract: Disclosed herein is a printed circuit board (PCB) including an embedded electronic component, including: a core having a cavity; an electronic component inserted into the cavity having a rough surface formed on surfaces of external electrodes provided on both lateral portions thereof, a low rough surface being formed in a portion of the rough surfaces; insulating layers laminated on upper and lower portions of the core and bonded to an outer circumferential surface of the electronic component insertedly positioned in the cavity; and an external circuit pattern provided on the insulating layers.
    Type: Application
    Filed: November 6, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANCIS CO., LTD.
    Inventors: Seung Eun Lee, Yee Na SHIN, Yul Kyo CHUNG, Doo Hwan LEE
  • Publication number: 20140182897
    Abstract: A circuit board includes an inorganic material insulating layer, a first circuit pattern layer formed on a surface of the inorganic material insulating layer, a first build-up insulating layer formed on the inorganic material insulating layer and formed of an organic material, and a second circuit pattern layer formed on a surface of the first build-up insulating layer.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Hwan LEE, Yul Kyo CHUNG, Yee Na SHIN, Seung Eun LEE
  • Publication number: 20140182896
    Abstract: A substrate having an electronic component embedded therein includes a first insulating layer including a cavity and including first and second circuit patterns provided on upper and lower surfaces thereof, respectively; the electronic component at least partially inserted into the cavity and including an external electrode; a plurality of build-up insulating layers stacked on or beneath the first insulating layer; upper and lower circuit patterns formed on the build-up insulating layers, respectively; and a plurality of vias connecting the external electrode, the upper circuit pattern, the first circuit pattern, the second circuit pattern, and the lower circuit pattern.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG, ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Hwan LEE, Yul Kyo CHUNG, Dae Hyun PARK, Yee Na SHIN, Seung Eun LEE
  • Publication number: 20140182889
    Abstract: Disclosed herein is a multilayered substrate including: a second insulating layer having a fine pattern layer formed on an upper surface thereof; and a third insulating layer having a circuit pattern layer formed on an upper surface thereof and formed of a material different from the second insulating layer, the circuit pattern layer having a pattern pitch larger than that of the fine pattern layer, thereby making it possible to solve a warpage problem and perform refinement and improvement in a degree of integration of an inner wiring.
    Type: Application
    Filed: October 23, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yee Na SHIN, Seung Eun Lee, Yul Kyo Chung, Doo Hwan Lee
  • Publication number: 20140182895
    Abstract: A multilayered substrate and a method of manufacturing the same. The multilayered substrate includes a plurality of wiring layers and reinforcing layers disposed at the outermost portions of both surfaces of the multilayered substrate, respectively, in order to decrease warpage of the multilayered substrate and has wiring patterns optimized depending on a scheme in which external electrodes are formed on an electronic component.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Doo Hwan LEE, Ho Shik KANG, Yee Na SHIN, Yul Kyo CHUNG, Seung Eun LEE
  • Publication number: 20140182916
    Abstract: The present invention relates to a circuit board, which can miniaturize a conductor pattern formed around a via and improve current pass characteristics of the via at the same time by including a via passing through an insulating layer to be in contact with an upper conductor pattern and a lower conductor pattern and having a bent portion whose cross-sectional area or diameter changes discontinuously.
    Type: Application
    Filed: October 28, 2013
    Publication date: July 3, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yee Na SHIN, Seung Eun LEE, Yul Kyo CHUNG, Doo Hwan LEE
  • Publication number: 20140185258
    Abstract: A substrate embedding a passive element includes a first conductor pattern layer disposed on a lower surface thereof and a second conductor pattern layer disposed on an upper surface thereof; a first via electrically connecting between the passive element and the first conductor pattern layer; and a second via electrically connecting between the passive element and the second conductor pattern layer, in which a volume of the first via is larger than that of the second via.
    Type: Application
    Filed: December 30, 2013
    Publication date: July 3, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Doo Hwan LEE, Yul Kyo Chung, Yee Na Shin, Seung Eun Lee
  • Publication number: 20140177192
    Abstract: The present invention relates to a core substrate, a manufacturing method thereof, and a substrate with built-in electronic components and a method for manufacturing the same. In accordance with an embodiment of the present invention, a core substrate including: a first insulating layer; and a second insulating layer stacked on upper and lower surfaces of the first insulating layer and made of a material with a glass transition temperature lower than that of the first insulating layer.
    Type: Application
    Filed: December 12, 2013
    Publication date: June 26, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Eun Lee, Yee Na SHIN, Yul Kyo CHUNG, Doo Hwan LEE
  • Publication number: 20140151104
    Abstract: The present invention relates to an electronic component embedded substrate including: a cavity formed in at least one insulating layer provided inside the electronic component embedded substrate; an electronic component having at least a portion inserted in the cavity; and a cavity plating portion formed on a surface of the cavity opposite to at least one surface of the electronic component, and can improve electrical connectivity between an external electrode and a via even when the size of the external electrode of the electronic component is reduced than before.
    Type: Application
    Filed: November 26, 2013
    Publication date: June 5, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yul Kyo CHUNG, DOO HWAN LEE, SEUNG EUN LEE, YEE NA SHIN
  • Publication number: 20140144676
    Abstract: The present invention relates to an electronic component embedded substrate including: a first insulating layer including a cavity; an electronic component inserted in the cavity; a first metal pattern formed on a lower surface of the first insulating layer to mount the electronic component thereon and including at least one guide hole for exposing a portion of the external electrode; a second insulating layer formed on the lower surface of the first insulating layer to cover the first metal pattern; a first circuit pattern formed on a lower surface of the second insulating layer; and a first via for electrically connecting the first external electrode exposed through the guide hole and the first circuit pattern, and can improve electrical connectivity between the external electrode and the via even when the size of the external electrode of the electronic component is reduced than before.
    Type: Application
    Filed: November 27, 2013
    Publication date: May 29, 2014
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yul Kyo CHUNG, Doo Hwan LEE, Seung Eun LEE, Yee Na SHIN
  • Publication number: 20140116761
    Abstract: The present invention relates to a multilayer ceramic capacitor and a printed circuit board including the same that can minimize thickness deviations of an external electrode and a multilayer ceramic. A multilayer ceramic capacitor according to an embodiment of the present invention includes a multilayer ceramic and external electrodes formed on both sides of the multilayer ceramic, wherein |Tmax?Tmin| may be less than 10 ?m, and |CTmax?CTmin| may be less than 20 ?m. (Here, Tmax is a maximum thickness of the external electrodes in a via processing area, Tmin is a minimum thickness of the external electrodes in the via processing area, CTmax is a maximum thickness of the multilayer ceramic capacitor in the via processing area, and CTmin is a minimum thickness of the multilayer ceramic capacitor in the via processing area.
    Type: Application
    Filed: October 9, 2013
    Publication date: May 1, 2014
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Eun Lee, Byoung Hwa Lee, Yee Na Shin, Yul Kyo Chung
  • Publication number: 20140090881
    Abstract: The present invention relates to a passive device embedded in a substrate, which includes a laminate formed by alternately laminating a plurality of internal electrodes and dielectric layers; a first external electrode covering one side surface of the laminate and having a first upper cover region, which covers a part of an upper portion of the laminate, and a first lower cover region, which covers a part of a lower portion of the laminate and is smaller than the first upper cover region; and a second external electrode covering the other side surface of the laminate and having a second lower cover region, which covers a part of the lower portion of the laminate, and a second upper cover region, which covers a part of the upper portion of the laminate and is smaller than the second lower cover region, and the substrate.
    Type: Application
    Filed: September 30, 2013
    Publication date: April 3, 2014
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yee Na SHIN, Yul Kyo Chung, Seung Eun Lee
  • Patent number: 8450844
    Abstract: There is provided a semiconductor package. A semiconductor package according to an aspect of the invention may include a core part having a semiconductor chip mounted within a receiving space therein; an insulation part provided on one surface of the core part; and a via part provided by filling a hole-processed surface formed simultaneously through the insulation part and a passivation layer for protecting an electrode pattern part on the semiconductor chip.
    Type: Grant
    Filed: July 13, 2010
    Date of Patent: May 28, 2013
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Yee Na Shin, Seung Wook Park
  • Publication number: 20130027896
    Abstract: The present invention relates to an electronic component embedded printed circuit board including: a substrate in which a cavity is formed; a plurality of electronic components embedded in the cavity; a metal member inserted between the plurality of electronic components; and insulating layers formed on both surfaces of the substrate to cover the plurality of electronic components, and it is possible to effectively improve heat radiation characteristics.
    Type: Application
    Filed: January 25, 2012
    Publication date: January 31, 2013
    Inventors: Seung Eun LEE, Hyun Ho Kim, Yee Na Shin
  • Publication number: 20120017435
    Abstract: A method of manufacturing a PCB having electronic components embedded therein, including: preparing a copper foil layer including a thin copper foil coated with a resin layer; fixing electronic components onto the resin layer; forming a core layer in which the electronic components are embedded; forming internal layer circuits which are electrically connected to the electronic components; forming an insulating layer on the internal layer circuits; and forming external layer circuits on the insulating layer such that the external layer circuits are electrically connected to the internal layer circuits.
    Type: Application
    Filed: October 6, 2011
    Publication date: January 26, 2012
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD
    Inventors: Seung Hyun Sohn, Yul Kyo Chung, Byoung Chan Kim, Moon Il Kim, Kwan Kyu Kim, Yee Na Shin
  • Publication number: 20110164391
    Abstract: Disclosed herein is an electronic component-embedded printed circuit board, including: a metal substrate including an anodic oxide film formed over the entire surface thereof; two electronic components disposed in a cavity formed in the metal substrate in two stages; an insulation layer formed on both sides of the metal substrate to bury the electronic components disposed in the cavity; and circuit layers including vias connected with connecting terminals of the electronic components and formed on the exposed surfaces of the insulation layer. The electronic component-embedded printed circuit board is advantageous in that its radiation performance of radiating the heat generated from an electronic component can be improved, and its production cost can be reduced, because a metal substrate is used instead of a conventional insulating material.
    Type: Application
    Filed: May 6, 2010
    Publication date: July 7, 2011
    Inventors: Yee Na SHIN, Tae Sung JEONG, Young Ki LEE, Seung Eun LEE
  • Publication number: 20110163437
    Abstract: There is provided a semiconductor package. A semiconductor package according to an aspect of the invention may include a core part having a semiconductor chip mounted within a receiving space therein; an insulation part provided on one surface of the core part; and a via part provided by filling a hole-processed surface formed simultaneously through the insulation part and a passivation layer for protecting an electrode pattern part on the semiconductor chip.
    Type: Application
    Filed: July 13, 2010
    Publication date: July 7, 2011
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Yee Na Shin, Seung Wook Park
  • Publication number: 20090277673
    Abstract: Provided is a PCB having electronic components embedded therein, the PCB including a core layer having electronic components embedded therein and a resin layer formed thereon and thereunder; internal layer circuits formed on the resin layer and being electrically connected to the electronic components; an insulating layer formed on the internal layer circuits; and external layer circuits formed on the insulating layer and being electrically connected to the internal layer circuits.
    Type: Application
    Filed: June 27, 2008
    Publication date: November 12, 2009
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Seung Hyun Sohn, Yul Kyo Chung, Byoung Chan Kim, Moon Il Kim, Kwan Kyu Kim, Yee Na Shin