Abstract: The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.

Abstract: Disclosed are a multi-value nonvolatile organic resistive random access memory and a method for preparing the same. The resistive random access memory comprises a top electrode, a bottom electrode and a middle functional layer located between the top electrode and the bottom electrode, the middle functional layer is at least two layers of parylene. The method comprises the steps of: growing material for the bottom electrode using physical vapor deposition method on a substrate; growing sequentially multiple layers of parylene on the bottom electrode by polymer chemical vapor deposition; defining the via for leading out the bottom electrode by lithography and etching; growing material for the top electrode on the parylene materials by using physical vapor deposition process, defining the top electrode material by lithography and lift-off, and leading out the bottom electrode.

Abstract: The present invention discloses an organic resistive random access memory and a preparation method thereof. The memory uses silicon as a substrate, and has a MIM capacitor structure having a vertical memory unit, where the MIM structure has a top electrode of Al, a bottom electrode of ITO, and an middle functional layer of parylene, wherein, a parylene layer as the functional layer is formed by performing deposition multiple times, where the deposition of Al2O3 is performed once by ALD between each two deposition of parylene. A critical region which is in favor of forming a conductive channel could be formed by controlling the deposition area of Al2O3, and further control the electrical characteristics of the memory. Through the present invention, the cycle-to-cycle and device-to-device uniformity could be effectively improved, without changing the basic structure of the memory.