Abstract: A disconnect module for engaging or disengaging a first component rotatable about a first shaft with or from the first shaft. The disconnect module includes a clutch member, mounted on the first shaft in a rotatably fixed manner; a drive member, arranged between the first component and the clutch member in an axial direction, and fixedly connected to the first component, wherein the clutch member is able to reciprocate axially to engage with and disengage from the drive member, the first shaft rotates together with the first component in an engaged state, and the first shaft is independent of the first component in a disengaged state. The present disclosure further relates to a power transmission system for a vehicle, including the disconnection mechanism, and further relates to a vehicle comprising the power transmission system.

Abstract: A disconnect module for engaging/disengaging a first shaft with a first component includes a connecting shaft arranged coaxially with the first shaft, one end of which is rotatably supported on the first shaft, and the other end connected to the first component, and a sliding sleeve on outer sides of the first shaft and the connecting shaft. The sliding sleeve is rotatably connected to the first shaft and can reciprocate axially by an axial distance to engage/disengage from the connecting shaft and includes a circumferential groove open to the outside. The module also includes a motor, a speed reducer connected to the motor and including an output shaft, and a drive block connected to the output shaft and extending into the circumferential groove and driven by the speed reducer to rotate, thereby driving the sliding sleeve to reciprocate axially. A mechanical position-limiting mechanism is provided on the output shaft.

Abstract: A disconnect module for engaging/disengaging a first component from a first shaft includes a clutch member rotatably mounted on the first shaft, a drive member axially arranged between the first component and the clutch member and connected to the first component. The clutch member can reciprocate axially to engage/disengage from the drive member. A reset assembly applies pressure to the clutch member towards a disengagement direction for disengaging from the drive member, and an actuator including an action end that can reciprocate axially. A pressing assembly configured to connect the action end with the clutch member, so under the pressure applied by the reset assembly, one reciprocating movement of the action end brings the clutch member from a disengaged state to an engaged state and maintains the engaged state until a next reciprocating movement of the action end brings the clutch member from the engaged state to the disengaged state.

Abstract: A semiconductor storage device of an embodiment includes a first conductive layer, a second conductive layer, a first conductive pillar, a first semiconductor layer, and a first storage layer. The first conductive layer extends in a first direction. The second conductive layer is along the first conductive layer in a third direction intersecting the first direction. The second conductive layer extends in the first direction. The first conductive pillar penetrates the first conductive layer and the second conductive layer in the third direction. The first semiconductor layer is in contact with the first conductive layer and the second conductive layer. The first semiconductor layer faces the first conductive pillar in the first direction. The first storage layer is between the first semiconductor layer and the first conductive pillar.

Abstract: In one embodiment, a semiconductor device includes a stacked film including electrode layers and first insulators alternately in a first direction, a top layer of the stacked film being a second insulator that is one of the first insulators. The device further includes a columnar portion including a third insulator, a charge storage layer, a fourth insulator and a first semiconductor layer that are sequentially provided in the stacked film. The device further includes a metal layer provided on the stacked film and the columnar portion, electrically connected to the first semiconductor layer, and including one or more layers. An upper end of the columnar portion is provided at a height between upper and lower faces of the second insulator. A lower end of a highest layer among the one or more layers is provided at a position lower than the upper face of the second insulator.

Abstract: A semiconductor storage device includes: a first conductive layer extending in a first direction; a second conductive layer that is disposed apart from the first conductive layer in a second direction intersecting the first direction, and extends in the first direction; a plurality of semiconductor layers provided between the first conductive layer and the second conductive layer and arranged in the first direction, each of which includes a first portion facing the first conductive layer, and a second portion facing the second conductive layer; a plurality of first memory cells provided between the first conductive layer and the semiconductor layers, respectively; and a plurality of second memory cells provided between the second conductive layer and the semiconductor layers, respectively. A gap is provided between the two semiconductor layers adjacent in the first direction.

Abstract: A semiconductor storage device includes a first conductive layer; a first insulating layer between the first and second conductive layers; a second insulating layer between the first conductive layer and the first insulating layer; a third insulating layer between the second conductive layer and the first insulating layer; a fourth insulating layer between the second conductive layer and the third conductive layer; a fifth insulating layer between the second conductive layer and the fourth insulating layer; and a sixth insulating layer between the third conductive layer and the fourth insulating layer. The first conductive layer has a first surface. The second conductive layer has a second surface. A barrier conductive film containing at least one of nitrogen (N) or titanium (Ti) is provided on the first surface and the second surface.

Abstract: According to one embodiment, a semiconductor storage device includes a semiconductor pillar including a channel. The channel includes a first channel portion and a second channel portion. A virtual cross section intersecting a first direction and including a first interconnection, a first electrode, the semiconductor pillar, a second electrode, and a second interconnection is determined. Both first end portions of the first channel portion and a first midpoint between both the first end portions are determined in the virtual cross section. Both second end portions of the second channel portion and a second midpoint between both the second end portions are determined in the virtual cross section. In this case, an angle between a second direction and a center line connecting the first midpoint and the second midpoint is an acute angle.

Abstract: A semiconductor storage device according to an embodiment includes a substrate, a first word line, a second word line, a first channel, a first memory film, a second channel, a second memory film, a first insulating layer, a first source line, and a first drain line. The second word line is separated from the first word line in a second direction. The first channel is aligned with the first word line in a third direction. The second channel is aligned with the second word line in the third direction. The first insulating layer is positioned between the first word line and the second word line in the second direction and between the first channel and the second channel in the second direction. The first source line and first drain line extend in the second direction.

Abstract: A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction.

Abstract: According to one embodiment, a semiconductor storage device includes a first interconnection, a second interconnection, a first channel part, a second channel part, a first charge storage part, a second charge storage part, a first insulator, a second insulator, and a third insulator. The first insulator includes a portion between at least a portion of the first charge storage part and at least a portion of the second charge storage part, and extends in a first direction. The second insulator is between the first insulator and the first interconnection, and extends in the first direction at a position arranged with respect to the first charge storage part in the first direction. The third insulator is between the second interconnection and the first insulator, and extends in the first direction at a position arranged with respect to the second charge storage part in the first direction.

Abstract: A semiconductor storage device includes: a first conductive layer extending in a first direction; a second conductive layer that is disposed apart from the first conductive layer in a second direction intersecting the first direction, and extends in the first direction; a plurality of semiconductor layers provided between the first conductive layer and the second conductive layer and arranged in the first direction, each of which includes a first portion facing the first conductive layer, and a second portion facing the second conductive layer; a plurality of first memory cells provided between the first conductive layer and the semiconductor layers, respectively; and a plurality of second memory cells provided between the second conductive layer and the semiconductor layers, respectively. A gap is provided between the two semiconductor layers adjacent in the first direction.

Abstract: A semiconductor storage device includes a first conductive layer; a first insulating layer between the first and second conductive layers; a second insulating layer between the first conductive layer and the first insulating layer; a third insulating layer between the second conductive layer and the first insulating layer; a fourth insulating layer between the second conductive layer and the third conductive layer; a fifth insulating layer between the second conductive layer and the fourth insulating layer; and a sixth insulating layer between the third conductive layer and the fourth insulating layer. The first conductive layer has a first surface. The second conductive layer has a second surface. A barrier conductive film containing at least one of nitrogen (N) or titanium (Ti) is provided on the first surface and the second surface.

Abstract: According to one embodiment, a semiconductor storage device includes a semiconductor pillar including a channel. The channel includes a first channel portion and a second channel portion. A virtual cross section intersecting a first direction and including a first interconnection, a first electrode, the semiconductor pillar, a second electrode, and a second interconnection is determined. Both first end portions of the first channel portion and a first midpoint between both the first end portions are determined in the virtual cross section. Both second end portions of the second channel portion and a second midpoint between both the second end portions are determined in the virtual cross section. In this case, an angle between a second direction and a center line connecting the first midpoint and the second midpoint is an acute angle.

Abstract: A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction.

Abstract: According to one embodiment, a semiconductor storage device includes a first interconnection, a second interconnection, a first channel part, a second channel part, a first charge storage part, a second charge storage part, a first insulator, a second insulator, and a third insulator. The first insulator includes a portion between at least a portion of the first charge storage part and at least a portion of the second charge storage part, and extends in a first direction. The second insulator is between the first insulator and the first interconnection, and extends in the first direction at a position arranged with respect to the first charge storage part in the first direction. The third insulator is between the second interconnection and the first insulator, and extends in the first direction at a position arranged with respect to the second charge storage part in the first direction.

Abstract: A memory device includes a first conductive layer and a second conductive layer. A variable resistance layer is disposed between the first conductive layer and the second conductive layer and includes a first layer containing a semiconductor or a first metal oxide, and a second layer containing a second metal oxide. A phase-change layer is disposed either between the first conductive layer and the variable resistance layer or between the second conductive layer and the variable resistance layer.

Abstract: A memory device includes a first conductive layer and a second conductive layer. A variable resistance layer is disposed between the first conductive layer and the second conductive layer and includes a first layer containing a semiconductor or a first metal oxide, and a second layer containing a second metal oxide. A phase-change layer is disposed either between the first conductive layer and the variable resistance layer or between the second conductive layer and the variable resistance layer.