Patents by Inventor Yefei HAN
Yefei HAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11792985Abstract: A semiconductor storage device includes: a first conductive layer extending in a first direction; a second conductive layer that is disposed apart from the first conductive layer in a second direction intersecting the first direction, and extends in the first direction; a plurality of semiconductor layers provided between the first conductive layer and the second conductive layer and arranged in the first direction, each of which includes a first portion facing the first conductive layer, and a second portion facing the second conductive layer; a plurality of first memory cells provided between the first conductive layer and the semiconductor layers, respectively; and a plurality of second memory cells provided between the second conductive layer and the semiconductor layers, respectively. A gap is provided between the two semiconductor layers adjacent in the first direction.Type: GrantFiled: March 3, 2021Date of Patent: October 17, 2023Assignee: KIOXIA CORPORATIONInventors: Tatsuya Kato, Satoshi Nagashima, Yefei Han, Takayuki Ishikawa
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Patent number: 11765899Abstract: A semiconductor storage device includes a first conductive layer; a first insulating layer between the first and second conductive layers; a second insulating layer between the first conductive layer and the first insulating layer; a third insulating layer between the second conductive layer and the first insulating layer; a fourth insulating layer between the second conductive layer and the third conductive layer; a fifth insulating layer between the second conductive layer and the fourth insulating layer; and a sixth insulating layer between the third conductive layer and the fourth insulating layer. The first conductive layer has a first surface. The second conductive layer has a second surface. A barrier conductive film containing at least one of nitrogen (N) or titanium (Ti) is provided on the first surface and the second surface.Type: GrantFiled: March 3, 2021Date of Patent: September 19, 2023Assignee: KIOXIA CORPORATIONInventors: Ryota Narasaki, Weili Cai, Satoshi Nagashima, Takayuki Ishikawa, Yusuke Shimada, Yefei Han
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Patent number: 11594543Abstract: According to one embodiment, a semiconductor storage device includes a semiconductor pillar including a channel. The channel includes a first channel portion and a second channel portion. A virtual cross section intersecting a first direction and including a first interconnection, a first electrode, the semiconductor pillar, a second electrode, and a second interconnection is determined. Both first end portions of the first channel portion and a first midpoint between both the first end portions are determined in the virtual cross section. Both second end portions of the second channel portion and a second midpoint between both the second end portions are determined in the virtual cross section. In this case, an angle between a second direction and a center line connecting the first midpoint and the second midpoint is an acute angle.Type: GrantFiled: September 11, 2020Date of Patent: February 28, 2023Assignee: Kioxia CorporationInventors: Yefei Han, Weili Cai, Naoya Yoshimura
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Publication number: 20230023327Abstract: A semiconductor storage device according to an embodiment includes a substrate, a first word line, a second word line, a first channel, a first memory film, a second channel, a second memory film, a first insulating layer, a first source line, and a first drain line. The second word line is separated from the first word line in a second direction. The first channel is aligned with the first word line in a third direction. The second channel is aligned with the second word line in the third direction. The first insulating layer is positioned between the first word line and the second word line in the second direction and between the first channel and the second channel in the second direction. The first source line and first drain line extend in the second direction.Type: ApplicationFiled: June 15, 2022Publication date: January 26, 2023Applicant: Kioxia CorporationInventors: Satoshi NAGASHIMA, Yefei HAN
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Patent number: 11417669Abstract: A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction.Type: GrantFiled: September 2, 2020Date of Patent: August 16, 2022Assignee: KIOXIA CORPORATIONInventors: Yefei Han, Yusuke Arayashiki
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Patent number: 11393834Abstract: According to one embodiment, a semiconductor storage device includes a first interconnection, a second interconnection, a first channel part, a second channel part, a first charge storage part, a second charge storage part, a first insulator, a second insulator, and a third insulator. The first insulator includes a portion between at least a portion of the first charge storage part and at least a portion of the second charge storage part, and extends in a first direction. The second insulator is between the first insulator and the first interconnection, and extends in the first direction at a position arranged with respect to the first charge storage part in the first direction. The third insulator is between the second interconnection and the first insulator, and extends in the first direction at a position arranged with respect to the second charge storage part in the first direction.Type: GrantFiled: August 19, 2020Date of Patent: July 19, 2022Assignee: KIOXIA CORPORATIONInventors: Yefei Han, Tetsu Morooka, Norio Ohtani
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Publication number: 20220085059Abstract: A semiconductor storage device includes: a first conductive layer extending in a first direction; a second conductive layer that is disposed apart from the first conductive layer in a second direction intersecting the first direction, and extends in the first direction; a plurality of semiconductor layers provided between the first conductive layer and the second conductive layer and arranged in the first direction, each of which includes a first portion facing the first conductive layer, and a second portion facing the second conductive layer; a plurality of first memory cells provided between the first conductive layer and the semiconductor layers, respectively; and a plurality of second memory cells provided between the second conductive layer and the semiconductor layers, respectively. A gap is provided between the two semiconductor layers adjacent in the first direction.Type: ApplicationFiled: March 3, 2021Publication date: March 17, 2022Inventors: Tatsuya KATO, Satoshi NAGASHIMA, Yefei HAN, Takayuki ISHIKAWA
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Publication number: 20220085060Abstract: A semiconductor storage device includes a first conductive layer; a first insulating layer between the first and second conductive layers; a second insulating layer between the first conductive layer and the first insulating layer; a third insulating layer between the second conductive layer and the first insulating layer; a fourth insulating layer between the second conductive layer and the third conductive layer; a fifth insulating layer between the second conductive layer and the fourth insulating layer; and a sixth insulating layer between the third conductive layer and the fourth insulating layer. The first conductive layer has a first surface. The second conductive layer has a second surface. A barrier conductive film containing at least one of nitrogen (N) or titanium (Ti) is provided on the first surface and the second surface.Type: ApplicationFiled: March 3, 2021Publication date: March 17, 2022Inventors: Ryota NARASAKI, Weili CAI, Satoshi NAGASHIMA, Takayuki ISHIKAWA, Yusuke SHIMADA, Yefei HAN
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Publication number: 20210296338Abstract: According to one embodiment, a semiconductor storage device includes a semiconductor pillar including a channel. The channel includes a first channel portion and a second channel portion. A virtual cross section intersecting a first direction and including a first interconnection, a first electrode, the semiconductor pillar, a second electrode, and a second interconnection is determined. Both first end portions of the first channel portion and a first midpoint between both the first end portions are determined in the virtual cross section. Both second end portions of the second channel portion and a second midpoint between both the second end portions are determined in the virtual cross section. In this case, an angle between a second direction and a center line connecting the first midpoint and the second midpoint is an acute angle.Type: ApplicationFiled: September 11, 2020Publication date: September 23, 2021Applicant: Kioxia CorporationInventors: Yefei HAN, Weili CAI, Naoya YOSHIMURA
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Publication number: 20210296332Abstract: A semiconductor memory device includes a semiconductor pillar including a semiconductor layer and extending along a first direction, a first wiring extending along a second direction crossing the first direction, a first electrode between the semiconductor pillar and the first wiring, a first insulating layer between the first electrode and the first wiring and adjacent to the first electrode, a second insulating layer between the first insulating layer and the first wiring and adjacent to the first insulating layer, the second insulating layer having a higher dielectric constant than the first insulating layer, and a third insulating layer between the second insulating layer and the first wiring. A shortest distance between the second insulating layer and the semiconductor layer in the second direction is greater than a shortest distance between the first electrode and the semiconductor layer in the second direction.Type: ApplicationFiled: September 2, 2020Publication date: September 23, 2021Inventors: Yefei HAN, Yusuke ARAYASHIKI
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Publication number: 20210057425Abstract: According to one embodiment, a semiconductor storage device includes a first interconnection, a second interconnection, a first channel part, a second channel part, a first charge storage part, a second charge storage part, a first insulator, a second insulator, and a third insulator. The first insulator includes a portion between at least a portion of the first charge storage part and at least a portion of the second charge storage part, and extends in a first direction. The second insulator is between the first insulator and the first interconnection, and extends in the first direction at a position arranged with respect to the first charge storage part in the first direction. The third insulator is between the second interconnection and the first insulator, and extends in the first direction at a position arranged with respect to the second charge storage part in the first direction.Type: ApplicationFiled: August 19, 2020Publication date: February 25, 2021Applicant: Kioxia CorporationInventors: Yefei HAN, Tetsu MOROOKA, Norio OHTANI
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Patent number: 10790443Abstract: A memory device includes a first conductive layer and a second conductive layer. A variable resistance layer is disposed between the first conductive layer and the second conductive layer and includes a first layer containing a semiconductor or a first metal oxide, and a second layer containing a second metal oxide. A phase-change layer is disposed either between the first conductive layer and the variable resistance layer or between the second conductive layer and the variable resistance layer.Type: GrantFiled: March 1, 2018Date of Patent: September 29, 2020Assignee: TOSHIBA MEMORY CORPORATIONInventors: Yefei Han, Tetsu Morooka
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Publication number: 20190088869Abstract: A memory device includes a first conductive layer and a second conductive layer. A variable resistance layer is disposed between the first conductive layer and the second conductive layer and includes a first layer containing a semiconductor or a first metal oxide, and a second layer containing a second metal oxide. A phase-change layer is disposed either between the first conductive layer and the variable resistance layer or between the second conductive layer and the variable resistance layer.Type: ApplicationFiled: March 1, 2018Publication date: March 21, 2019Applicant: TOSHIBA MEMORY CORPORATIONInventors: Yefei HAN, Tetsu MOROOKA