Abstract: An integrated circuit (IC), comprises a receiver on an IC substrate. The receiver is configured to receive a stressed input signal. A built in self test (BIST) circuit is provided on the IC substrate for testing the receiver. The BIST circuit comprises an encoder configured for receiving an input signal and identifying whether a first condition is present, in which two or more consecutive input data bits have the same polarity as each other. An output driver circuit provides the stressed input signal corresponding to the two or more consecutive input data bits. The stressed input signal has an amplitude that is larger when the encoder identifies that the first condition is present and smaller when the encoder identifies that two or more consecutive input data bits have different polarity from each other.

Abstract: System and method for testing jitter tolerance by using a built-in jitter modulation circuit is disclosed. An embodiment comprises a jitter modulation circuit, a transmitter, a receiver and a data comparison unit. The jitter modulation circuit includes a plurality of data latches, a phase-select block and a multi-phase clock generator. The multi-phase clock generator is capable of generating a plurality of signals having different phase shifts wherein one signal having a phase shift from the system clock signal is selected by the phase-select block. The selected signal alters the data by injecting jitter through a plurality of data latches. The jitter-contaminated data is transmitted to a data comparison unit through a transmitter and a receiver. The on-chip test circuit compares the jitter-contaminated data with the original data and calculates the bit error rate so as to determine whether the jitter tolerance of this semiconductor device satisfies the specification.

Abstract: This invention discloses a phase interpolation controller for a clock and data recovery circuit receiving an indication of a phase relationship between a first and a second signal, the phase interpolation controller comprises a plurality of serially coupled bi-directional shift-registers, wherein when the received indication indicates the first signal is ahead of the second signal in phase, the plurality of serially coupled bi-directional shift-registers shifts in one of the bi-directions, and when the received indication indicates the first signal is behind the second signal in phase, the plurality of serially coupled bi-directional shift-registers shifts in the other of the bi-directions.

Abstract: A clutchable pry bar includes a bar member with a fitting connector; a rack member fitted with the fitting connector of the bar member, including two slots adjacent to a closed end of the rack member, and including two through holes proximate to an opened end of the rack member; a ratchet shaft inserted to the through hole of the rack member, and including a first end portion disposed on one end thereof; at least one ratchet member fitted to the ratchet shaft, a plate member movably fixed to the slots of the rack member, a returning spring between pegs of the plate member and a central extension of the bar member; a stem member to be retained with the ratchet shaft after the stem member is inserted to a radial bore of the ratchet shaft.

Abstract: A clutchable winch contains a shaft member including: a tube used to fix a belt; a fitting piece including a central hole mounted thereon; a column fixed on the central hole; a sleeve coupled with the fitting piece, including a groove arranged on one end thereof and a connecting end secured on another end thereof, the connecting end including plural apertures disposed thereon; a positioning disc fixed on a bottom end of the groove, including plural first inclined teeth arranged therearound, the first inclined teeth being spaced apart evenly from each other and each having a vertical side; an annular actuating plate fitted on the column, including a hexagonal pore arranged on a central portion thereof and plural second inclined teeth disposed on one end surface thereof, wherein each second tooth includes a vertical fringe; a compression spring defined between the actuating plate and the fitting piece of the tube.

Abstract: This description relates to an edge detector including a pulse generator configured to generate a first pulse when a first clock and a second clock are at a same logic level and generate a second pulse when the first clock and the second clock are at different logic levels. The edge detector further includes a first RC circuit configured to charge the first pulse and a second RC circuit configured to charge the second pulse. The edge detector further includes a circuitry that, based on a width of the first pulse or of the second pulse, is configured to provide a select signal to select an edge of the second clock for triggering.

Abstract: A strap tightener for securing cargo is disclosed. The tightener includes a base frame and a handling frame, which pivotally connect to form a vee structure. The base frame is connected to the handling frame by inserting a pivot into pivot hole thereof. Each of two ends of the pivot is ringed with a protection loop and a ratchet wheel. The protection loop is composed of a flange for being blockedly fixed on the pivot hole and a sleeve for penetrating into the pivot hole. The sleeve can protect the pivot hole to prevent it from being directly pressed by the pivot.

Abstract: A packaged image sensor assembly utilizes a spacer paste to control the height of a transparent window above an image sensor die to provide safe wire bond clearance. A dam structure is used to control the height of the transparent window. The dam may be formed either entirely from spacer paste or by depositing the spacer paste on an underlying patterned mesa. An additional encapsulant is provided outside of the dam to encapsulate wirebonds and provide additional protection from moisture permeation.

Abstract: Power supply regulators, integrated circuits including a power supply regulator, and methods of regulating a power supply are provided. In one embodiment, a power supply regulator includes a first self-bias circuit configured to receive a supply voltage from a power supply, a second self-bias circuit coupled to a reference voltage, and a clamping circuit coupled between the first and second self-bias circuits. The clamping circuit includes a NMOS transistor coupled to the first self-bias circuit and a PMOS transistor coupled to the second self-bias circuit. The clamping circuit is further configured to generate an output voltage less than the supply voltage at substantially the same time as when the supply voltage is received from the power supply.

Abstract: An output driver having a power supply line, a control switch, at least one protection device and at least one voltage clamp device. The control switch disposed between the at least one protection device and the power supply line an output line. The at least one protection device disposed in a series arrangement between the output line and the control switch. The at least one voltage clamp device disposed across a corresponding protection device and adapted to clamp a voltage across the protection device below a predetermined threshold voltage.

Abstract: In some embodiments related to a smart edge detector, the smart edge detector uses a second clock in a receiver domain (e.g., clock CLK_D2) to trigger a first flip-flop having a first clock in a transmitter domain (e.g., clock CLK_D1) as input data for the first flip-flop. The clock CLK_D2 through a delay cell also triggers a second flip-flop having the same clock CLK_D1 as input data for the second flip-flop. Based on the output of the first flip-flop (e.g., output S1) and of the second flip-flop (e.g., output S2), the embodiments determine whether the rising and or falling edge of clock CLK_D2 should be used for triggering in a transmitting and receiving application. The embodiments are applicable in both situations where the rising edge or falling edge of clock CLK_D1 is used as a triggering edge. Other embodiments are also disclosed.

Abstract: An integrated circuit (IC), comprises a receiver on an IC substrate. The receiver is configured to receive a stressed input signal. A built in self test (BIST) circuit is provided on the IC substrate for testing the receiver. The BIST circuit comprises an encoder configured for receiving an input signal and identifying whether a first condition is present, in which two or more consecutive input data bits have the same polarity as each other. An output driver circuit provides the stressed input signal corresponding to the two or more consecutive input data bits. The stressed input signal has an amplitude that is larger when the encoder identifies that the first condition is present and smaller when the encoder identifies that two or more consecutive input data bits have different polarity from each other.

Abstract: The cargo bar of the invention includes a telescoping rod composed of an outer tube and an inner tube. One end of a toothed rail is fastened on the inner tube and the other end thereof longitudinally extends along the outer tube so that the toothed rail can move with the inner tube. An iron assembly, which is composed of a housing and a U-shaped bracket, is fixed at one end of the outer tube. The U-shaped bracket accommodates the toothed rail and pivotally connects a handle. A plurality of cogs are formed on the pivotal end of the handle. When the handle is closed, the cogs engage with the toothed rail so as to jam the inner tube. That is, the total length formed by the two tubes stays fixed. When the handle is opened, the cogs disengage with the toothed rail so as to make the inner tube become adjustable.

Abstract: Circuit and method for an adaptive elastic buffer for receiving data including timing signals. Received data is recovered and stored in the adaptive elastic buffer, and a recovery clock pointer is increased to identify the next buffer location for stuffing received data, responsive to a controller. When a data fetch enable condition occurs, the controller causes a receiver circuit to fetch the data stored at a location identified by a system clock pointer. Underflow and overflow conditions are detected and the controller adapts the effective elastic buffer depth to compensate for these conditions. A buffer of M/2 physical locations is adaptively operated to provide a data buffer of M virtual locations. A method of buffering received data with a buffer having M/2 physical locations so as to provide the benefit of a buffer with M virtual locations is disclosed.

Abstract: An auxiliary member for a ratchet buckle includes a U-shaped frame, a shank; two plastic bushes, a levering set, a holder, and a bolt set, wherein central sections of two sides of the frame connect with the shank axially, one end of the shank couples with the levering set, and open ends of the two sides of the frame connect with a body of the buckle by using the bolt set, such that the belt can be pulled while in use and rolled while in no use easily, and used to fix merchandises securely during transporting process.

Abstract: The cargo bar includes a toothed rod and a ratchet actuator. The ratchet actuator is composed of a carriage, a wrench bar with a handle, a main pawl, an auxiliary pawl and an elastic member. When the handle is reciprocated, the wrench bar drives the pawls to push teeth on the toothed rod, and then the toothed rod is elongated outwards. The carriage is disposed with a rotatable release key. When the release key is rotated in a specific direction, the auxiliary pawl and the main pawl will be pushed directly and indirectly by the release key, respectively, and then the two pawls withdraw from the toothed rod to make the toothed rod bidirectionally slidable.

Abstract: The cargo bar of the invention includes a telescoping rod composed of an outer tube and an inner tube. One end of a toothed rail is fastened on the inner tube and the other end thereof longitudinally extends along the outer tube so that the toothed rail can move with the inner tube. An iron assembly, which is composed of a housing and a U-shaped bracket, is fixed at one end of the outer tube. The U-shaped bracket accommodates the toothed rail and pivotally connects a handle. A plurality of cogs are formed on the pivotal end of the handle. When the handle is closed, the cogs engage with the toothed rail so as to jam the inner tube. That is, the total length formed by the two tubes stays fixed. When the handle is opened, the cogs disengage with the toothed rail so as to make the inner tube become adjustable.

Abstract: System and method for testing jitter tolerance by using a built-in jitter modulation circuit is disclosed. An embodiment comprises a jitter modulation circuit, a transmitter, a receiver and a data comparison unit. The jitter modulation circuit includes a plurality of data latches, a phase-select block and a multi-phase clock generator. The multi-phase clock generator is capable of generating a plurality of signals having different phase shifts wherein one signal having a phase shift from the system clock signal is selected by the phase-select block. The selected signal alters the data by injecting jitter through a plurality of data latches. The jitter-contaminated data is transmitted to a data comparison unit through a transmitter and a receiver. The on-chip test circuit compares the jitter-contaminated data with the original data and calculates the bit error rate so as to determine whether the jitter tolerance of this semiconductor device satisfies the specification.

Abstract: A clock data recovery comprises a phase detector, a phase interpolator, an initial phase detector, and an initial phase decoder. The phase detector receives an incoming data stream and an interpolated clock signal and output an early/late value indicating timing relationship between the incoming data stream and the interpolated clock signal. The phase interpolator receives the early/late signal and at least one reference clock signal and generate an interpolated clock signal considering the early/late value and the at least one reference clock signal. The initial phase detector receives the incoming data stream and output a first data indicating a phase of the incoming data stream. The initial phase decoder receives data indicating a phase of the incoming data stream and select the at least one reference clock signal from a plurality of clock signals considering the data indicating a phase of the incoming data stream.

Abstract: A clutchable winch contains a shaft member including: a tube used to fix a belt; a fitting piece including a central hole mounted thereon; a column fixed on the central hole; a sleeve coupled with the fitting piece, including a groove arranged on one end thereof and a connecting end secured on another end thereof, the connecting end including plural apertures disposed thereon; a positioning disc fixed on a bottom end of the groove, including plural first inclined teeth arranged therearound, the first inclined teeth being spaced apart evenly from each other and each having a vertical side; an annular actuating plate fitted on the column, including a hexagonal pore arranged on a central portion thereof and plural second inclined teeth disposed on one end surface thereof, wherein each second tooth includes a vertical fringe; a compression spring defined between the actuating plate and the fitting piece of the tube.