Patents by Inventor Yeh-Hsun Fang

Yeh-Hsun Fang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11894411
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: February 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Publication number: 20230378234
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Application
    Filed: August 4, 2023
    Publication date: November 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Publication number: 20230378218
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.
    Type: Application
    Filed: August 8, 2023
    Publication date: November 23, 2023
    Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
  • Patent number: 11626442
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.
    Type: Grant
    Filed: August 10, 2020
    Date of Patent: April 11, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
  • Publication number: 20230093001
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 23, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Patent number: 11610825
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: March 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Publication number: 20230066466
    Abstract: A method of forming a semiconductor device includes: forming a patterned hard mask layer on a semiconductor substrate; performing a first etching process to form a recess in an exposed portion of the semiconductor substrate, using a first etchant that includes a first halogen species; performing a second etching process using a second etchant that includes a second halogen species, such that the second halogen species forms a barrier layer in the semiconductor substrate, surrounding the recess; and growing a detection region in the recess using an epitaxial growth process. The barrier layer is configured to reduce diffusion of the first halogen species into the detection region.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Yeh-Hsun FANG, Zhi-Wei ZHUANG, Li-Hsin CHU
  • Publication number: 20230065710
    Abstract: An image sensor for a Time-of-Flight imaging system is disclosed that includes at least one primary sensor having a photodetector that includes a photovoltaic junction formed at least partially in a germanium-containing material that includes germanium at an atomic percentage greater than 50%, and at least one secondary sensor having a photodetector that includes a photovoltaic junction formed in a second material, such as a silicon-containing material, that includes germanium at an atomic percentage between 0% and 50%. The primary sensor may detect Time-of-Flight measurement signals and the secondary sensor may detect background light, such as sunlight, to correct for background light interference.
    Type: Application
    Filed: August 27, 2021
    Publication date: March 2, 2023
    Inventors: Yeh-Hsun FANG, Zhi-Wei ZHUANG, Li-Hsin CHU
  • Publication number: 20230066085
    Abstract: A photodetector including a substrate having a semiconductor material layer, such as a silicon-containing layer, and a germanium-based well embedded in the semiconductor material layer, where a gap is located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer. The gap between the lateral side surface of the germanium-based well and the surrounding semiconductor material layer may reduce the surface contact area between the germanium-containing material of the well and the surrounding semiconductor material, which may be a silicon-based material. The formation of the gap located between a lateral side surface of the germanium-based well and the surrounding semiconductor material layer may help minimize the formation of crystal defects, such as slips, in the germanium-based well, and thereby reduce the dark current and improve photodetector performance.
    Type: Application
    Filed: August 28, 2021
    Publication date: March 2, 2023
    Inventors: Yeh-Hsun FANG, Zhi-We ZHUANG, Li-Hsin CHU
  • Patent number: 11515355
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: November 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LIMITED
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Publication number: 20220375972
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.
    Type: Application
    Filed: August 4, 2022
    Publication date: November 24, 2022
    Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
  • Publication number: 20220045109
    Abstract: Various embodiments of the present disclosure are directed towards methods for forming an image sensor in which a device layer overlies and has a different semiconductor material than a substrate and in which the device layer has high crystalline quality. Some embodiments of the methods include: epitaxially growing the device layer on the substrate; patterning the device layer to form a trench dividing the device layer into mesa structures corresponding to pixels; forming an inter-pixel dielectric layer filling the trench and separating the mesa structures; and forming photodetectors in the mesa structures. Other embodiments of the methods include: depositing the inter-pixel dielectric layer over the substrate; patterning the inter-pixel dielectric layer to form cavities corresponding to the pixels; epitaxially growing the mesa structures in the cavities; and forming the photodetectors in the mesa structures.
    Type: Application
    Filed: August 10, 2020
    Publication date: February 10, 2022
    Inventors: Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai, Szu-Chien Tseng, Yeh-Hsun Fang
  • Publication number: 20210391378
    Abstract: A method includes forming a plurality of openings extending into a substrate from a front surface of the substrate. The substrate includes a first semiconductor material. Each of the plurality of openings has a curve-based bottom surface. The method includes filling the plurality of openings with a second semiconductor material. The second semiconductor material is different from the first semiconductor material. The method includes forming a plurality of pixels that are configured to sense light in the plurality of openings, respectively, using the second semiconductor material.
    Type: Application
    Filed: June 15, 2020
    Publication date: December 16, 2021
    Applicant: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Yeh-Hsun Fang, Chiao-Chi Wang, Chung-Chuan Tseng, Chia-Ping Lai
  • Publication number: 20210043524
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).
    Type: Application
    Filed: October 26, 2020
    Publication date: February 11, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Patent number: 10818563
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: October 27, 2020
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Publication number: 20200098650
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A first depth parameter (t) of the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on the first depth parameter (t).
    Type: Application
    Filed: November 26, 2019
    Publication date: March 26, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Patent number: 10515861
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A depth parameter (t) the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on a pre-determined standard reference curve comprising a plurality of references depth parameters in a first range as a function of a plurality of reference processing temperatures in a second range.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: December 24, 2019
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng
  • Publication number: 20190035697
    Abstract: In a method for semiconductor processing, a semiconductor substrate is provided. The semiconductor substrate defines at least one first trench therein. The at least one first trench has a first depth (d1). A coating layer is deposited onto the semiconductor substrate using at least one precursor under a setting for a processing temperature (T). The coating layer defines at least one second trench having a second depth (d2) above the at least one first trench. A depth parameter (t) the second depth (d2) relative to the first depth (d1) is determined. The processing temperature (T) is then determined based on a pre-determined standard reference curve comprising a plurality of references depth parameters in a first range as a function of a plurality of reference processing temperatures in a second range.
    Type: Application
    Filed: March 29, 2018
    Publication date: January 31, 2019
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Fen Chen, Tsung-Ying Liu, Yeh-Hsun Fang, Bang-Yu Huang, Chui-Ya Peng