Abstract: An infrared subwavelength metasurface lens implements slit width modulation focusing of infrared light into a subwavelength region located within a silicon substrate. The lens includes a metasurface deposited on a surface of the silicon substrate, where the metasurface has multiple discrete copper elements separated by uniformly distributed slits of different widths. The device may also implement refractive index modulation by filling different slits with silicon or air. The infrared subwavelength metasurface lens may be coupled with a thermoelectric generator to form a thermoelectric infrared harvesting device.

Abstract: An infrared subwavelength metasurface lens implements slit width modulation focusing of infrared light into a subwavelength region located within a silicon substrate. The lens includes a metasurface deposited on a surface of the silicon substrate, where the metasurface has multiple discrete copper elements separated by uniformly distributed slits of different widths. The device may also implement refractive index modulation by filling different slits with silicon or air. The infrared subwavelength metasurface lens may be coupled with a thermoelectric generator to form a thermoelectric infrared harvesting device.

Abstract: A voltage regulator provides a regulated output voltage [108] from an input voltage [100] using control unit [106] to control a switched capacitor circuit [102] to periodically produce different output voltage levels Vx followed by a low pass filter [104] to give a regulated output voltage. Phase interleaving is used where the phases of different voltage levels are interleaved allowing for increased effective switching frequency and reduced switching losses. By controlling the average voltage on the flying capacitors, output voltage is regulated by modulating the resistance of the switches using a duty cycle. A control unit [106] is used to determine the operation region of the voltage regulator device and configure the switched capacitor circuit in each operation region. The controller contains a state machine that determines the switches configuration in each phase of a complete switching cycle.

Abstract: A voltage regulator provides a regulated output voltage [108] from an input voltage [100] using control unit [106] to control a switched capacitor circuit [102] to periodically produce different output voltage levels Vx followed by a low pass filter [104] to give a regulated output voltage. Phase interleaving is used where the phases of different voltage levels are interleaved allowing for increased effective switching frequency and reduced switching losses. By controlling the average voltage on the flying capacitors, output voltage is regulated by modulating the resistance of the switches using a duty cycle. A control unit [106] is used to determine the operation region of the voltage regulator device and configure the switched capacitor circuit in each operation region. The controller contains a state machine that determines the switches configuration in each phase of a complete switching cycle.

Abstract: In one aspect, the invention relates to logic cells that utilize one or more of spin diodes. By placing one or two control wires on the side of the spin diodes to generate magnetic fields in the spin diodes due to input currents, the logic cell can be changed from one logic gate to another logic gate. The unique feature leads to field logic devices in which simple instructions can be used to construct a whole new set of logic gates.

Abstract: A stocked product sensing system that can be used with a product display, displaying product items on one or more shelves thereof, to determine the level of product availability and/or configuration of product items on one or more shelves of the product display. According to one embodiment of this invention, the stocked product sensing system utilizes capacitive sensing at the shelf-level. According to another embodiment of this invention, the stocked product sensing system utilizes optical sensing at the shelf-level. The stocked product sensing system of this invention may utilize a store-level management system and/or a central management system and generate low stock alarms based on user-defined criteria in a software system.

Abstract: A stocked product sensing system that can be used with a product display, displaying product items on one or more shelves thereof, to determine the level of product availability and/or configuration of product items on one or more shelves of the product display. According to one embodiment of this invention, the stocked product sensing system utilizes capacitive sensing at the shelf-level. According to another embodiment of this invention, the stocked product sensing system utilizes optical sensing at the shelf-level. The stocked product sensing system of this invention may utilize a store-level management system and/or a central management system and generate low stock alarms based on user-defined criteria in a software system.

Abstract: A method for dynamic timing-dependent power estimation for a digital circuit having coupled interconnects and at least two gates. In one embodiment, the method includes the steps of capturing information on relative switching activities and timing dependence for the coupled interconnects in the digital circuit, estimating the probabilities associated with switching activities and timing dependence for each gate in the digital circuit from the captured information, and obtaining dynamic power estimation of the digital circuit from the estimations of the probabilities.

Abstract: Certain embodiments provide systems and methods for reducing power consumption in on-chip caches. Certain embodiments include Power Density-Minimized Architecture (PMA) and Block Permutation Scheme (BPS) for thermal management of on-chip caches. Instead of turning off entire banks, PMA architecture spreads out active parts in a cache bank by turning off alternating rows in a bank. This reduces the power density of the active parts in the cache, which then lowers the junction temperature. The drop in the temperature results in energy savings from the remaining active parts of the cache. BPS aims to maximize the physical distance between the logically consecutive blocks of the cache. Since there is spatial locality in caches, this distribution results in an increase in the distance between hot spots, thereby reducing the peak temperature. The drop in the peak temperature then results in a leakage power reduction in the cache.

Abstract: An interconnect architecture is provided to reduce power consumption. A first driver may drive signals on a first interconnect and a second driver may drive signals on a second interconnect. The first driver may be powered by a first voltage and the second driver may be powered by a second voltage different than the first voltage.

Abstract: A method for mapping moments in a reduced order system of approximation order q for use in simulating a circuit or system having n state variables at n nodes, the circuit or system having I inputs. The method includes calculating only q+I moments, where q is the approximation order and I is the number of inputs of the circuit or system being simulated, sorting the state variables at the n nodes, selecting q nodes of the n nodes, and calculating the dominate poles and zeros using a multi-point moment matching algorithm to simultaneously match q+I moments at the selected q nodes of the circuit or system. In one embodiment, the method includes using extra dummy inputs such that the total number of inputs equals I, such that K*I>q where K is a constant having a value in the range of about 4 to 8.

Abstract: Transfer functions are calculated in the following manner within an RLC tree having a input and a plurality of nodes. The RLC tree is divided into left and right sub-trees joined by the node closest to the input. Each of the left and right sub-trees is divided into left and right sub-trees joined by a node. The sub-trees are divided recursively into still smaller sub-trees until the RLC tree is completely decomposed into left and right sub-trees joined by nodes. At each node of the RLC tree, the numerator and denominator of the transfer function at that node are determined in accordance with the left and right sub-trees joined by that node. The denominator of the transfer function of the node closest to the input is taken to be the denominator of all of the transfer functions of the RLC tree.