Abstract: The boot operations of one or more systems may be redirected. For example, a master boot processor may configure a slave boot processor to boot over a communication bus existing between the processors, which typically eliminates the need for boot software in slave systems. This can be accomplished such as by the master system updating a programmable interface of the slave system to identify an image from which to boot, such as from a remote boot image stored external to the slave system.

Abstract: A novel and useful mechanism of synchronizing and aligning a plurality of data streams. The invention comprises a plurality of sync machines and an alignment circuit which in combination function to synchronize and align multiple variable length cell streams. Each sync machine is operative to control the output clocking of a corresponding FIFO queue. The data stream output of each FIFO queue is monitored by a sync machine and all the sync machines are coupled to the alignment circuit. In operation, the sync machines synchronize to the cells by searching for the error checks sequence (ECS) at the end of each cell. Upon synchronization being achieved for all the data streams, the alignment circuit causes each sync machine to freeze its respective FIFO until the ECS arrives on the data stream most delayed in time. Once the ECS is received on the slowest data stream, the alignment circuit releases the hold and consequently the FIFOs are released by the sync machines.

Abstract: A novel and useful apparatus for and method of in-band clock compensation for use in synchronous communication systems. The clock compensation mechanism is implemented in each module and is operative to compensate for the differences between the clocks among the various modules in the system. The mechanism operates in band wherein special clock compensation symbols are periodically inserted into the data stream itself. Additional clock sync symbols are added to the data stream depending on the current level of the FIFO queue on the module or card. The insertion (or non-insertion) of additional symbols functions to compensate for the faster (or slower) clock of the module when compared to that of the reference.