Abstract: A device and a method for exchanging information with registers of a physical layer component. The method includes allocating at least one receive buffer for receiving the status information; associating at least one receive buffer descriptor with the at least one receive buffer; sending to a physical layer component a request to read status information stored in a selected status register of the physical layer component; and writing the status information to the at least one receive buffer descriptor.

Abstract: A device and a method for exchanging information with registers of a physical layer component. The method includes allocating at least one receive buffer for receiving the status information; associating at least one receive buffer descriptor with the at least one receive buffer; sending to a physical layer component a request to read status information stored in a selected status register of the physical layer component; and writing the status information to the at least one receive buffer descriptor.

Abstract: An embedded system that has a general purpose central processing unit CPU and a digital signal processor DSP, the CPU is adapted to perform various tasks such as code consuming tasks associated to the transmission and reception of information and the DSP is adapted to perform tasks that require less program code and that are associated to the transmission and reception of information. Most of the time the CPU can handle tasks that are not related to the transmission and reception of data.

Abstract: A data communication system (2) provides a circuit and method for prioritizing and controlling the transfer of data to and from a plurality of communication channels (6-11). The data communication system defines a predetermined data threshold level (X,Y) for a data buffer (16-21) for each of the plurality of communication channels. A service request signal is generated for a one of the plurality of communication channels when a respective data buffer stores data to be transferred. The data communication system generates a threshold signal for a communication channel when a data value stored in a respective data buffer reaches a predetermined data threshold level of the data buffer. The priority levels of the communication channels which generate threshold and service request signals are then compared to determine a high priority communication channel. The highest priority communication channel is then serviced.

Abstract: A data processing system (100) of the present invention analyses input data (10) for statistical similarities in time and determines processing steps depending on the analysis. The system (100) transfers a first data set (12) which changes at every time transition (i-1) to i into a second data set (13) to output sets (22 and 23) by a transfer function H. According to a method of the present invention, the number of calculation instructions h(n) which are performed is established by comparing consecutive old input data (12) and new input data (13). The transfer function H is thereby simplified and the number of executed instructions optimized.

Abstract: A voltage spike detection circuit for use in detecting clock edge transitions utilizes a voltage change detection circuit (16) and a voltage spike latching circuit (18). The voltage change detection circuit (16) provides an output pulse in response to each edge transition of a serial communication clock, including an edge caused by a noise spike on the serial communication clock. In response to receiving the output pulse of the voltage change detection circuit (16), the voltage spike latching circuit (18) provides an active system interrupt signal to a serial communication system. When the serial communication system receives the active system interrupt signal, the serial communication system momentarily activates a system reset signal and re-communicates the serial communication data.