Patents by Inventor Yejoong Kim

Yejoong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Adaptively switched network-on-chip
    Patent number: 9961019
    Abstract: A packet-switched reservation request to be associated with a first data stream is received. A communication mode is selected. The communication mode is to be either a circuit-switched mode or a packet-switched mode. At least a portion of the first data stream is communicated in accordance with the communication mode.
    Type: Grant
    Filed: December 22, 2014
    Date of Patent: May 1, 2018
    Assignee: Intel Corporation
    Inventors: Gregory K. Chen, Mark A. Anders, Himanshu Kaul, Ram K. Krishnamurthy, Yejoong Kim
  • Measurement circuitry and method for measuring a clock node to output node delay of a flip-flop
    Patent number: 9638752
    Abstract: A measurement circuit and method are provided for measuring a clock node to output node delay of a flip-flop. A main ring oscillator has a plurality of main unit cells arranged in a ring, with each main unit cell comprising a flip-flop and pulse generation circuitry connected to the output node of the flip-flop. The flip-flop is responsive to receipt of an input clock pulse at the clock node to output a data value transition from the output node, and the pulse generation circuitry then generates from the data value transition an input clock pulse for a next main unit cell in the main ring, whereby the main ring oscillator generates a first output signal having a first oscillation period.
    Type: Grant
    Filed: February 7, 2014
    Date of Patent: May 2, 2017
    Assignees: ARM Limited, The Regents of the University of Michigan
    Inventors: Yejoong Kim, Dennis Michael Sylvester, David Theodore Blaauw, Brian Tracy Cline
  • ADAPTIVELY SWITCHED NETWORK-ON-CHIP
    Publication number: 20160182405
    Abstract: A packet-switched reservation request to be associated with a first data stream is received. A communication mode is selected. The communication mode is to be either a circuit-switched mode or a packet-switched mode. At least a portion of the first data stream is communicated in accordance with the communication mode.
    Type: Application
    Filed: December 22, 2014
    Publication date: June 23, 2016
    Inventors: Gregory K. Chen, Mark A. Anders, Himanshu Kaul, Ram K. Krishnamurthy, Yejoong Kim
  • MEASUREMENT CIRCUITRY AND METHOD FOR MEASURING A CLOCK NODE TO OUTPUT NODE DELAY OF A FLIP-FLOP
    Publication number: 20150226800
    Abstract: A measurement circuit and method are provided for measuring a clock node to output node delay of a flip-flop. A main ring oscillator has a plurality of main unit cells arranged in a ring, with each main unit cell comprising a flip-flop and pulse generation circuitry connected to the output node of the flip-flop. The flip-flop is responsive to receipt of an input clock pulse at the clock node to output a data value transition from the output node, and the pulse generation circuitry then generates from the data value transition an input clock pulse for a next main unit cell in the main ring, whereby the main ring oscillator generates a first output signal having a first oscillation period.
    Type: Application
    Filed: February 7, 2014
    Publication date: August 13, 2015
    Applicants: THE REGENTS OF THE UNIVERSITY OF MICHIGAN, ARM LIMITED
    Inventors: Yejoong KIM, Dennis Michael SYLVESTER, David Theodore BLAAUW, Brian Tracy CLINE
  • Static signal value storage circuitry using a single clock signal
    Patent number: 9065431
    Abstract: Signal value storage circuitry 2 is provided which includes a first transistor stack, a second transistor stack and a third transistor stack. The signal value storage circuitry is controlled by a single clock signal. Keeper transistors and isolation transistors serve to permit static operation of the signal value storage circuitry (i.e. the clock signal may be stopped without losing state) and to prevent contention within the circuitry.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: June 23, 2015
    Assignee: The Regent of the University of Michigan
    Inventors: Yejoong Kim, Michael B. Henry, Dennis Michael Sylvester, David Theodore Blaauw