Patents by Inventor Yelandur R. Gopalakrishna

Yelandur R. Gopalakrishna has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Low voltage serial to parallel to serial charge coupled device
    Patent number: 4376897
    Abstract: This serial to parallel to serial (SPS) charge coupled device (CCD) shift register memory has a serial output shift register with stage gate electrode structures that are interdigitated with the gate electrode structures of each last stage of a plurality of parallel shift registers to transfer interlaced data bits from the parallel shift registers to the serial output register in a sequential order. This is done without employing a fixed voltage midway between the highest clock voltage and reference potential in the parallel registers in what is commonly called a midway store to regulate the transfer of data to the interdigitated gate electrode structures.
    Type: Grant
    Filed: June 25, 1980
    Date of Patent: March 15, 1983
    Assignee: International Business Machines Corp.
    Inventors: John J. Byrne, Jean M. Ferre, Yelandur R. Gopalakrishna
  • Serial parallel charge coupled device employing a gate splitting device
    Patent number: 4303992
    Abstract: This serial to parallel to serial (SPS) charge coupled device (CCD) shift register memory has a serial output shift register with gate electrode structures that are interdigitated with the gate electrode structures of each last stage of a plurality of parallel shift registers to transfer interlaced data bits from the parallel shift registers to the serial output register in a sequential order.
    Type: Grant
    Filed: May 13, 1980
    Date of Patent: December 1, 1981
    Assignee: International Business Machines Corporation
    Inventors: Keith G. Barkley, Majid Ghafghaichi, Yelandur R. Gopalakrishna, Albert J. Tzou