Patents by Inventor Yemin Dong

Yemin Dong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9570545
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is formed in the trench. First and second diffusion regions are formed. The gate is displaced from the second diffusion region.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: February 14, 2017
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Yemin Dong, Liang Yi, Zhanfeng Liu, Purakh Raj Verma, Ramadas Nambatyathu
  • Publication number: 20150236085
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is formed in the trench. First and second diffusion regions are formed. The gate is displaced from the second diffusion region.
    Type: Application
    Filed: April 22, 2015
    Publication date: August 20, 2015
    Inventors: Yemin DONG, Liang YI, Zhanfeng LIU, Purakh Raj VERMA, Ramadas NAMBATYATHU
  • Patent number: 9054133
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is formed in the trench. First and second diffusion regions are formed. The gate is displaced from the second diffusion region.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: June 9, 2015
    Assignee: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Yemin Dong, Liang Yi, Zhanfeng Liu, Purakh Raj Verma, Ramadas Nambatyathu
  • Patent number: 8999769
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having an upper and a lower portion is formed in a trench in the substrate in the device region. The upper portion forms a gate electrode and the lower portion forms a gate field plate. First and second surface doped regions are formed adjacent to the gate. The gate field plate introduces vertical reduced surface (RESURF) effect in a drift region of the device.
    Type: Grant
    Filed: July 18, 2012
    Date of Patent: April 7, 2015
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Purakh Raj Verma, Liang Yi, Yemin Dong
  • Publication number: 20140021534
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having an upper and a lower portion is formed in a trench in the substrate in the device region. The upper portion forms a gate electrode and the lower portion forms a gate field plate. First and second surface doped regions are formed adjacent to the gate. The gate field plate introduces vertical reduced surface (RESURF) effect in a drift region of the device.
    Type: Application
    Filed: July 18, 2012
    Publication date: January 23, 2014
    Applicant: GLOBALFOUNDRIES SINGAPORE PTE. LTD.
    Inventors: Purakh Raj VERMA, Liang YI, Yemin DONG
  • Publication number: 20130334601
    Abstract: A method of forming a device is disclosed. A substrate defined with a device region is provided. A gate having a gate electrode, first and second gate dielectric layers is formed in a trench. The trench has an upper trench portion and a lower trench portion. A field plate is formed in the trench. First and second diffusion regions are formed. The gate is displaced from the second diffusion region.
    Type: Application
    Filed: July 23, 2013
    Publication date: December 19, 2013
    Applicant: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Yemin DONG, Liang YI, Zhanfeng LIU, Purakh Raj VERMA, Ramadas NAMBATYATHU
  • Patent number: 8138051
    Abstract: A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a first type at a first concentration; forming an isolation region around the active region; forming a parasitic transistor by applying a gate electrode, implanted with impurities of a second type at a second concentration, over the active region and the isolation region; and applying an isolation edge implant, with the impurities of the first type at a third concentration greater than or equal to the second concentration, for suppressing the parasitic transistor.
    Type: Grant
    Filed: June 19, 2009
    Date of Patent: March 20, 2012
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Yemin Dong, Purakh Raj Verma, Xin Zou, Chao Cheng, Shao-fu Sanford Chu
  • Publication number: 20100320529
    Abstract: A method of manufacture of an integrated circuit system includes: providing a semiconductor substrate having an active region, implanted with impurities of a first type at a first concentration; forming an isolation region around the active region; forming a parasitic transistor by applying a gate electrode, implanted with impurities of a second type at a second concentration, over the active region and the isolation region; and applying an isolation edge implant, with the impurities of the first type at a third concentration greater than or equal to the second concentration, for suppressing the parasitic transistor.
    Type: Application
    Filed: June 19, 2009
    Publication date: December 23, 2010
    Applicant: CHARTERED SEMICONDUCTOR MANUFACTURING LTD.
    Inventors: Yemin Dong, Purakh Raj Verma, Xin Zou, Chao Cheng, Shao-fu Sanford Chu