Patents by Inventor Yen-Bin Huang
Yen-Bin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240293536Abstract: The present invention relates to a porcine bivalent subunit vaccine composition in a single dose. The porcine bivalent subunit vaccine composition includes porcine bivalent antigen, CpG adjuvant and a dual phase adjuvant. The porcine bivalent antigen consists of a classical swine fever virus (CSFV)-E2 recombinant protein and a porcine circovirus type 2 (PCV2)-ORF2 recombinant protein, both of which are produced by a mammalian cell expression system. The porcine bivalent subunit vaccine composition in a single dose can confer effectively immune protection against CSFV and PCV2 via a single vaccination without boost vaccination.Type: ApplicationFiled: December 22, 2023Publication date: September 5, 2024Applicant: National Pingtung University Of Science And TechnologyInventors: Hso-Chi Chaung, Wen-Bin Chung, Yen-Li Huang, Chi-Chih Chen, Yu-Chieh Chen
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Patent number: 11094579Abstract: A method of forming a semiconductor structure includes depositing a mask layer over a substrate. The method includes etching the substrate to define a first opening. The method includes depositing a sacrificial material in the first opening. The method includes depositing a dielectric liner along sidewalls of the first opening, wherein a bottom surface of the dielectric liner contacts the sacrificial material. The method includes removing the sacrificial material. The method includes etching the substrate to enlarge the first opening to define a second opening. The second opening includes a first portion extending a first depth from the dielectric material in a first direction perpendicular to a top surface of the substrate, and a second portion extending in a second direction, parallel to the top surface of the substrate. The method includes removing the dielectric liner. The method includes filling the second opening with a dielectric material.Type: GrantFiled: May 26, 2020Date of Patent: August 17, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Bin Huang, Chien-Mao Chen, Yu-Hsuan Kuo, Shih-Kai Fan, Chia-Hung Lai, Kang-Min Kuo
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Publication number: 20200286774Abstract: A method of forming a semiconductor structure includes depositing a mask layer over a substrate. The method includes etching the substrate to define a first opening. The method includes depositing a sacrificial material in the first opening. The method includes depositing a dielectric liner along sidewalls of the first opening, wherein a bottom surface of the dielectric liner contacts the sacrificial material. The method includes removing the sacrificial material. The method includes etching the substrate to enlarge the first opening to define a second opening. The second opening includes a first portion extending a first depth from the dielectric material in a first direction perpendicular to a top surface of the substrate, and a second portion extending in a second direction, parallel to the top surface of the substrate. The method includes removing the dielectric liner. The method includes filling the second opening with a dielectric material.Type: ApplicationFiled: May 26, 2020Publication date: September 10, 2020Inventors: Yen-Bin HUANG, Chien-Mao CHEN, Yu-Hsuan KUO, Shih-Kai FAN, Chia-Hung LAI, Kang-Min KUO
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Patent number: 10699938Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.Type: GrantFiled: July 18, 2013Date of Patent: June 30, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Bin Huang, Chien-Mao Chen, Yu-Hsuan Kuo, Shih-Kai Fan, Chia-Hung Lai, Kang-Min Kuo
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Publication number: 20150021700Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.Type: ApplicationFiled: July 18, 2013Publication date: January 22, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Yen-Bin HUANG, Chien-Mao CHEN, Yu-Hsuan KUO, Shih-Kai FAN, Chia-Hung LAI, Kang-Min KUO
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Patent number: 8046860Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: GrantFiled: September 20, 2010Date of Patent: November 1, 2011Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Publication number: 20110005010Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: ApplicationFiled: September 20, 2010Publication date: January 13, 2011Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 7819980Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: GrantFiled: August 16, 2005Date of Patent: October 26, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
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Patent number: 7759136Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.Type: GrantFiled: September 8, 2006Date of Patent: July 20, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chang-Cheng Hung, Hung Chang Hsieh, Shih-Ming Chang, Wen-Chuan Wang, Chi-Lun Lu, Allen Hsia, Yen-Bin Huang
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Patent number: 7460251Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.Type: GrantFiled: October 5, 2005Date of Patent: December 2, 2008Assignee: Taiwan Semiconductor Manufacturing Co.Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong-Chang Hsieh
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Publication number: 20070231935Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.Type: ApplicationFiled: September 8, 2006Publication date: October 4, 2007Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chang-Cheng HUNG, Hung Chang HSIEH, Shih-Ming CHANG, Wen-Chuan WANG, Chi-Lun LU, Allen HSIA, Yen-Bin HUANG
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Publication number: 20070075037Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.Type: ApplicationFiled: October 5, 2005Publication date: April 5, 2007Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong Hsieh
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Publication number: 20070039631Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.Type: ApplicationFiled: August 16, 2005Publication date: February 22, 2007Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin