Patents by Inventor Yen-Bin Huang

Yen-Bin Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240293536
    Abstract: The present invention relates to a porcine bivalent subunit vaccine composition in a single dose. The porcine bivalent subunit vaccine composition includes porcine bivalent antigen, CpG adjuvant and a dual phase adjuvant. The porcine bivalent antigen consists of a classical swine fever virus (CSFV)-E2 recombinant protein and a porcine circovirus type 2 (PCV2)-ORF2 recombinant protein, both of which are produced by a mammalian cell expression system. The porcine bivalent subunit vaccine composition in a single dose can confer effectively immune protection against CSFV and PCV2 via a single vaccination without boost vaccination.
    Type: Application
    Filed: December 22, 2023
    Publication date: September 5, 2024
    Applicant: National Pingtung University Of Science And Technology
    Inventors: Hso-Chi Chaung, Wen-Bin Chung, Yen-Li Huang, Chi-Chih Chen, Yu-Chieh Chen
  • Patent number: 11094579
    Abstract: A method of forming a semiconductor structure includes depositing a mask layer over a substrate. The method includes etching the substrate to define a first opening. The method includes depositing a sacrificial material in the first opening. The method includes depositing a dielectric liner along sidewalls of the first opening, wherein a bottom surface of the dielectric liner contacts the sacrificial material. The method includes removing the sacrificial material. The method includes etching the substrate to enlarge the first opening to define a second opening. The second opening includes a first portion extending a first depth from the dielectric material in a first direction perpendicular to a top surface of the substrate, and a second portion extending in a second direction, parallel to the top surface of the substrate. The method includes removing the dielectric liner. The method includes filling the second opening with a dielectric material.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: August 17, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Bin Huang, Chien-Mao Chen, Yu-Hsuan Kuo, Shih-Kai Fan, Chia-Hung Lai, Kang-Min Kuo
  • Publication number: 20200286774
    Abstract: A method of forming a semiconductor structure includes depositing a mask layer over a substrate. The method includes etching the substrate to define a first opening. The method includes depositing a sacrificial material in the first opening. The method includes depositing a dielectric liner along sidewalls of the first opening, wherein a bottom surface of the dielectric liner contacts the sacrificial material. The method includes removing the sacrificial material. The method includes etching the substrate to enlarge the first opening to define a second opening. The second opening includes a first portion extending a first depth from the dielectric material in a first direction perpendicular to a top surface of the substrate, and a second portion extending in a second direction, parallel to the top surface of the substrate. The method includes removing the dielectric liner. The method includes filling the second opening with a dielectric material.
    Type: Application
    Filed: May 26, 2020
    Publication date: September 10, 2020
    Inventors: Yen-Bin HUANG, Chien-Mao CHEN, Yu-Hsuan KUO, Shih-Kai FAN, Chia-Hung LAI, Kang-Min KUO
  • Patent number: 10699938
    Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.
    Type: Grant
    Filed: July 18, 2013
    Date of Patent: June 30, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Bin Huang, Chien-Mao Chen, Yu-Hsuan Kuo, Shih-Kai Fan, Chia-Hung Lai, Kang-Min Kuo
  • Publication number: 20150021700
    Abstract: A semiconductor structure includes a shallow trench isolation (STI) structure. The semiconductor structure includes a substrate having a first surface. A STI structure extends from the first surface into the substrate. The STI structure includes a first portion and a second portion. The first portion extends from the first surface into the substrate, and has an intersection with the first surface. The second portion extends away from the first portion, and has a tip at a distance away from the intersection in a direction parallel to the first surface. The first portion and the second portion are filled with a dielectric material.
    Type: Application
    Filed: July 18, 2013
    Publication date: January 22, 2015
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Bin HUANG, Chien-Mao CHEN, Yu-Hsuan KUO, Shih-Kai FAN, Chia-Hung LAI, Kang-Min KUO
  • Patent number: 8046860
    Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
    Type: Grant
    Filed: September 20, 2010
    Date of Patent: November 1, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
  • Publication number: 20110005010
    Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
    Type: Application
    Filed: September 20, 2010
    Publication date: January 13, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 7819980
    Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
    Type: Grant
    Filed: August 16, 2005
    Date of Patent: October 26, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin
  • Patent number: 7759136
    Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: July 20, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Cheng Hung, Hung Chang Hsieh, Shih-Ming Chang, Wen-Chuan Wang, Chi-Lun Lu, Allen Hsia, Yen-Bin Huang
  • Patent number: 7460251
    Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.
    Type: Grant
    Filed: October 5, 2005
    Date of Patent: December 2, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co.
    Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong-Chang Hsieh
  • Publication number: 20070231935
    Abstract: A method for patterning a substrate includes forming a material layer on the substrate; performing a first etching on the material layer to form a pattern; measuring the pattern of the material layer using an optical spectrum metrology tool; determining whether the measuring indicates that the etching step achieved a predefined result; and producing an etching recipe and performing a second etching of the material layer using the etching recipe if the predefined result was not achieved.
    Type: Application
    Filed: September 8, 2006
    Publication date: October 4, 2007
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chang-Cheng HUNG, Hung Chang HSIEH, Shih-Ming CHANG, Wen-Chuan WANG, Chi-Lun LU, Allen HSIA, Yen-Bin HUANG
  • Publication number: 20070075037
    Abstract: A system and method are disclosed for monitoring a dimensional change of a pattern for an object having a transparent layer exposed through the pattern and a non-transparent pattern laminated therewith. According to the method, a first beam is projected to the pattern. A second beam resulted from the first beam passing through the transparent layer exposed by the pattern, or from the first beam reflected from the non-transparent layer of the pattern, is detected. A value of a predetermined property from the second beam detected is obtained. A variation of the value is monitored for identifying the dimensional change of the pattern.
    Type: Application
    Filed: October 5, 2005
    Publication date: April 5, 2007
    Inventors: Shih-Ming Chang, Chen-Yuan Hsia, Wen-Chuan Wang, Chi-Lun Lu, Yen-Bin Huang, Chang-Cheng Hung, Chia-Jen Chen, Kai-Chung Liu, Hsin-Chang Lee, Hong Hsieh
  • Publication number: 20070039631
    Abstract: A system for semiconductor wafer manufacturing, comprises a chamber process path for processing the wafer, and a device operable to remove particles from the wafer by electrostatic and electromagnetic methodologies wherein the device is installed in the chamber process path.
    Type: Application
    Filed: August 16, 2005
    Publication date: February 22, 2007
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Yuan Hsia, Chang-Cheng Hung, Chi-Lun Lu, Shih-Ming Chang, Wen-Chuan Wang, Yen-Bin Huang, Ching-Yu Chang, Chin-Hsiang Lin