Abstract: A chip packaging structure and a method for fabricating the same are provided. The chip package structure includes a conductive substrate, a dam and a metal shielding layer. The conductive substrate includes a substrate, vias and electrodes. The substrate has first and second board surfaces opposite to each other. The vias penetrate through the first board surface and the second board surface, and a part of the vias is disposed in a first die-bonding region on which a chip is to be arranged. The electrodes extend from the first board surface to the second board surface through the vias. The dam is formed on the first board surface to surround the first die-bonding region, and the dam has a height higher than that of the chip. The metal shielding layer covers the dam and a part of the first board surface that do not overlap with the electrodes.

Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.

Abstract: A package structure is provided. The package structure includes a semiconductor die and a thermoelectric structure disposed on the semiconductor die. The thermoelectric structure includes P-type semiconductor blocks, N-type semiconductor blocks and metal pads. The P-type semiconductor blocks and the N-type semiconductor blocks are arranged in alternation with the metal pads connecting the P-type semiconductor blocks and the N-type semiconductor blocks. When a current flowing through one of the N-type semiconductor block, one of the metal pad, and one of the P-type semiconductor block in order, the metal pad between the N-type semiconductor block and the P-type semiconductor block forms a cold junction which absorbs heat generated by the semiconductor die.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: A semiconductor device includes a first redistribution structure, a first semiconductor package, a second semiconductor package, an encapsulation layer, a first thermal interface material (TIM) layer, and a second TIM layer. The first semiconductor package and the second semiconductor package are respectively disposed on the first redistribution structure and laterally disposed aside with each other. The encapsulation layer encapsulates and surrounds the first semiconductor package and the second semiconductor package. The first semiconductor package and the second semiconductor package are respectively exposed from the encapsulation layer. The first TIM layer and the second TIM layer are respectively disposed on back surfaces of the first semiconductor package and the second semiconductor package. A top surface of the first TIM layer and a top surface of the second TIM layer are coplanar with a top surface of the encapsulation layer.

Abstract: A smoke detector includes a substrate, an optical detection module, a base and a top cover. The substrate has a ring shape region surrounding a central detection region, and a first block structure of the central detection region is protruded from the substrate and higher than an upper surface of the ring shape region. The optical detection module is disposed inside the central detection region. The base is disposed on the substrate and around the optical detection module. The base has a second block structure. The top cover is connected to the base. A lateral wall of the top cover is partly overlapped with the second block structure to form a guiding channel. The optical detection module analyzes variation of scattering parameters resulted from gaseous matter entering the top cover through the guiding channel for determining concentration of the gaseous matter.

Abstract: A method includes coating a photoresist film over a target layer; performing a lithography process to pattern the photoresist film into a photoresist layer, wherein the photoresist layer has an opening, and the opening of the photoresist layer at least has a first sidewall, a second sidewall non-parallel with the first sidewall, and a first corner connecting the first and second sidewalls; performing a first directional ion bombardment process to the first corner of the photoresist layer along a first direction, wherein the first direction is non-perpendicular to both the first and second sidewalls of the photoresist when viewed from top; and after the first directional ion bombardment process is complete, patterning the target layer using the photoresist layer as a patterning mask.

Abstract: A semiconductor package and a manufacturing method thereof are described. The semiconductor package includes a package having dies encapsulated by an encapsulant, a redistribution circuit structure, first and second modules and affixing blocks. The redistribution circuit structure is disposed on the package. The first and second modules are disposed on and respectively electrically connected to the redistribution circuit structure by first and second connectors disposed there-between. The first and second modules are adjacent to each other and disposed side by side on the redistribution circuit structure. The affixing blocks are disposed on the redistribution circuit structure and between the first and second modules and the redistribution circuit structure. The affixing blocks include first footing portions located below the first module, second footing portions located below the second module, and exposed portions exposed from the first and second modules.

Abstract: In some aspects of the present disclosure, a power detection system is disclosed. In some aspects, the power detection system includes a constant-transconductance (gm) reference generator circuit receiving a power supply voltage. In some embodiments, the constant-gm reference generator circuit includes a first current mirror to provide a first reference voltage and a second current mirror to provide a second reference voltage. In some embodiments, the constant-gm reference generator circuit includes a power detection circuit coupled to the first current mirror to receive the first reference voltage. In some embodiments, the power detection circuit is coupled to the second current mirror to receive the second reference voltage. In some embodiments, the power detection is operated to receive the power supply voltage. In some embodiments, the power detection circuit is operated to provide an output voltage having one of two logic states at least based on the second reference voltage and the power supply voltage.

Abstract: A dynamic random access memory applied to an embedded display port includes a memory core unit, a peripheral circuit unit, and an input/output unit. The memory core unit is used for operating in a first predetermined voltage. The peripheral circuit unit is electrically connected to the memory core unit for operating in a second predetermined voltage, where the second predetermined voltage is lower than 1.1V. The input/output unit is electrically connected to the memory core unit and the peripheral circuit unit for operating in a third predetermined voltage, where the third predetermined voltage is lower than 1.1V.

Abstract: A performing device of an impulse-like gesture recognition system executes an impulse-like gesture recognition method. A performing procedure of the impulse-like gesture recognition method includes steps of: receiving a sensing signal from a sensing unit; determining a prediction with at least one impulse-like label according to the sensing frames by a deep learning-based model; and classifying at least one gesture event according to the prediction. The gesture event is classified to determine the motion of the user. Since the at least one impulse-like label is used to label at least one detection score of the deep learning-based model, the detection score is non-decreasing, reaction time of the at least one gesture event for an incoming gesture is fast, rapid consecutive gestures are easily decomposed, and an expensive post-processing is not needed.

Abstract: A backlight module is applied to providing light to a plurality of keyswitches of a keyboard. Each keyswitch has a keycap and an elastic member abutting against the keycap. The backlight module includes a membrane circuit board and a light guide plate. The membrane circuit board has a light emitting diode corresponding to the keyswitch. The light emitting diode is located at a side of the elastic member and emits light to the keycap. The light guide plate is disposed on the membrane circuit board. The light guide plate has a slot hole for containing the light emitting diode and has a hole corresponding to the elastic member. An optical microstructure is formed on the light guide plate for guiding light of the light emitting diode to be incident to the keycap. The elastic member passes through the hole to be disposed on the membrane circuit board.

Abstract: A fiber optic adapter includes an outer housing, a receiving seat, and a blocking mechanism. The outer housing defines two connection slots. The receiving seat is connected detachably to the outer housing, and defines two through grooves respectively in spatial communication with the connection slots. The blocking mechanism includes a pivot shaft, a torsion spring sleeved on the pivot shaft, and two cover plates connected pivotally to the pivot shaft and respectively connected to two opposite ends of the torsion spring. When each cover plate is in a blocking position, the cover plate blocks a respective connection slot, and is inclined relative to a central axis of the respective connection slot with a free end thereof being more towards the rear than the pivot shaft, and with an angle that is defines between the cover plate and the central axis being not a right angle.

Abstract: A method includes forming a reconstructed wafer, which includes placing a plurality of package components over a carrier, forming an interconnect structure over and electrically interconnecting the plurality of package components, forming top electrical connectors over and electrically connecting to the interconnect structure, and forming alignment marks at a same level as the top electrical connectors. Probe pads in the top electrical connectors are probed, and the probing is performed using the alignment marks for aligning to the probe pads. An additional package component is bonded to the reconstructed wafer through solder regions. The solder regions are physically joined to the top electrical connectors.

Abstract: A power adapter assembly structure is disclosed and includes a circuit board, a socket and at least one elastic element. The socket is disposed adjacent to the circuit board. The circuit board and the socket are configured to collaboratively form at least one abutting surface and at least one fixing surface. The elastic element is connected between the circuit board and the socket, and includes a main body, a fixed portion and a hanging arm. The fixed portion and the hanging arm are disposed at two opposite ends of the main body, the fixed portion spatially corresponds to the fixing surface, and the hanging arm constantly abuts the abutting surface. A height is formed between the main body of the at least one elastic element and the at least one abutting surface, and less than a length of the hanging arm extended from the main body.

Abstract: A system and method for forming pixels in an image sensor is provided. In an embodiment, a semiconductor device includes an image sensor including a first pixel region and a second pixel region in a substrate, the first pixel region being adjacent to the second pixel region. A first anti-reflection coating is over the first pixel region, the first anti-reflection coating reducing reflection for a first wavelength range of incident light. A second anti-reflection coating is over the second pixel region, the second anti-reflection coating reducing reflection for a second wavelength range of incident light that is different from the first wavelength range.

Abstract: There is provided a smoke detector including a light source, a reflective surface, a light sensor and a processor. The light sensor receives reflected light when the light source emits light toward the reflective surface, and generates a reference detection signal when there is no smoke. The processor receives the detection signal from the light sensor, and automatically selects a set of predetermined condition thresholds according to a profile of the detection signal to be compared with the detection signal thereby determining whether to generate an alarm according to the comparison result.

Abstract: An apparatus for detecting unsupported utterances in natural language understanding, includes a memory storing instructions, and at least one processor configured to execute the instructions to classify a feature that is extracted from an input utterance of a user, as one of in-domain and out-of-domain (OOD) for a response to the input utterance, obtain an OOD score of the extracted feature, and identify whether the feature is classified as OOD. The at least one processor is further configured to executed the instructions to, based on the feature being identified to be classified as in-domain, identify whether the obtained OOD score is greater than a predefined threshold, and based on the OOD score being identified to be greater than the predefined threshold, re-classify the feature as OOD.

Abstract: A method for forming a semiconductor device is provided. In some embodiments, the method includes forming a target layer over a semiconductor substrate, forming a carbon-rich hard masking layer over the target layer, patterning features in the carbon-rich hard masking layer using an etching process, performing a directional ion beam trimming process on the features patterned in the carbon-rich hard masking layer, and patterning the target layer using the carbon-rich hard masking layer as a mask.

Abstract: A method of manufacturing a heart valve prosthesis includes cutting a flat sheet of a valve material into a single-piece valve pattern having two or more valve leaflet regions and a valve skirt region. The method also includes arranging the two or more valve leaflet regions of the single-piece valve pattern into a mold for forming a leaflet belly for each of the two or more valve leaflet regions. Further, the method includes fixing, while arranged in the mold, a shape of the leaflet belly of each of two or more valve leaflet regions of the single piece-valve pattern. The method additionally includes creating a side seam by attaching two longitudinal edges of the single-piece valve pattern, to thereby form a tubular valve subassembly with two or more valve leaflets. The method includes attaching the tubular valve subassembly within a tubular frame to form a heart valve prosthesis.