Abstract: Disclosed are a method and system for static behavior-predictive malware detection. The method and system use a transfer learning model from behavior prediction to malware detection based on static features. In accordance with an embodiment, machine learning is used to capture the relations between static features, behavior features, and other context information. For example, the machine learning may be implemented with a deep learning network model with multiple embedded layers pre-trained with metadata gathered from various resources, including sandbox logs, simulator logs and context information. Synthesized behavior-related static features are generated by projecting the original static features to the behavior features. A final static model may then be trained using the combination of the original static features and the synthesized features as the training data. The detection stage may be performed in real time with static analysis because only static features are needed.

Abstract: A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.

Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.

Abstract: A voltage conversion device having a circuit board and a metal shielding cover are provided in this disclosure. The circuit board has a front surface and a back surface. The front surface of the circuit board is provided with a transformer circuit and an assembling terminal electrically connected to the transformer circuit. A through hole is defined at a position on the circuit board corresponding to the assembly terminal. The back surface of the circuit board is covered by the metal shielding cover, and the metal shielding cover is provided with a conductive pin corresponding to the assembling terminal. The assembling terminal is provided with a clamp, and the clamp is arranged corresponding to the position of the through hole. The conductive pin passes through the through hole and clamped by the clamp, and the metal shielding cover is thereby fixed on the circuit board.

Abstract: A chip package structure includes an interposer structure that contains a package-side redistribution structure, an interposer core assembly, and a die-side redistribution structure. The interposer core assembly includes at least one silicon substrate interposer, and each of the at least one silicon substrate interposer includes a respective silicon substrate, a respective set of through-silicon via (TSV) structures vertically extending through the respective silicon substrate, a respective set of interconnect-level dielectric layers embedding a respective set of metal interconnect structures, and a respective set of metal bonding structures that are electrically connected to the die-side redistribution structure. The chip package structure includes at least two semiconductor dies that are attached to the die-side redistribution structure, and an epoxy molding compound (EMC) multi-die frame that laterally encloses the at least two semiconductor dies.

Abstract: A display system includes a camera, a processor and a display. The camera is configured to shoot a first image and a second image in order. The processor is configured to generate a third image when a difference between the first image and the second image is larger than or equal to a preset difference value. The display is configured to display the first image and the third image in order when the difference is larger than or equal to the preset difference value. A display method and an image capture device are also disclosed herein.

Abstract: Various showerheads and methods are provided. A showerhead may include a faceplate partially defined by a front surface and a back surface, a back plate having a gas inlet, a first conical frustum surface, and a second conical frustum surface, a plenum volume fluidically connected to the gas inlet and at least partially defined by the gas inlet, the back surface of the faceplate, the first conical frustum surface, and the second conical frustum surface, and a baffle plate positioned within the plenum volume, and having a plurality of baffle plate through-holes extending through the baffle plate. The second conical frustum surface may be positioned radially outwards from the first conical frustum surface with respect to a center axis of the showerhead, and the second conical frustum surface may be positioned along the center axis farther from the gas inlet than the first conical frustum surface.

Abstract: Disclosed herein are humanized antibodies, antigen-binding fragments thereof, and antibody conjugates, that are capable of specifically binding to certain biantennary Lewis antigens, which antigens are expressed in a variety of cancers. The presently disclosed antibodies are useful to target antigen-expressing cells for treatment or detection of disease, including various cancers. Also provided are polynucleotides, vectors, and host cells for producing the disclosed antibodies and antigen-binding fragments thereof. Pharmaceutical compositions, methods of treatment and detection, and uses of the antibodies, antigen-binding fragments, antibody conjugates, and compositions are also provided.

Abstract: A device and method for fabricating the same is disclosed. For example, the device includes a sensor having a front side and a back side, a metal interconnect layer formed on the front side of the sensor, an anti-reflective coating formed on the back side of the sensor, a composite etch stop mask layer formed on the anti-reflective coating wherein the composite etch stop mask layer includes a hydrogen rich layer and a compressive high density layer, and a light filter formed on the composite etch stop mask layer.

Abstract: A polymer film comprising polyvinyl acetal and a laminated glass manufactured using the same are provided. At least one surface of the polymer film has a void volume (Vv) value at a material ratio of 10% ranging from 3 ?m3/?m2 to 34.3 ?m3/?m2, wherein the void volume (Vv) and material ratio are defined in accordance with ISO 25178-2:2012.

Abstract: There is provided a smoke detector including a substrate, a light source and a light sensor. The light source and the light sensor are arranged adjacently on the substrate. The substrate is arranged with an asymmetric structure to cause an illumination region of the light source to deviate toward the light sensor thereby increasing a ratio of light intensity reflected by smoke with respect to reference light intensity.

Abstract: An optical fiber coupling device includes a casing and a coupling component. The casing has a receiving slot that extends therethrough along a first direction. The coupling component is removably disposed in the receiving slot of the casing, and has at least one coupling slot that extends therethrough along the first direction. The at least one coupling slot has two opposite plugging sections that are arranged along the first direction. The plugging sections are compatible with one of LC, MPO and SC connectors.

Abstract: A light-emitting module structure includes a substrate, a plurality of light-emitting diodes (LEDs) disposed on the substrate, and a light-guiding layer covering the light-emitting diodes. The light-guiding layer has an upper surface, the upper surface has a plurality of recesses, and the recesses are above the light-emitting diodes or between the light-emitting diodes. This light-emitting module structure can improve the brightness and uniformity of the light-emitting module.

Abstract: A semiconductor structure includes a semiconductor wafer, a first surface mount component, a second surface mount component and a first barrier structure. The first surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of first electrical connectors. The second surface mount component is disposed on the semiconductor wafer, and electrically connected to the semiconductor wafer through a plurality of second electrical connectors, wherein an edge of the second surface mount component is overhanging a periphery of the semiconductor wafer. The first barrier structure is disposed on the semiconductor wafer in between the second electrical connectors and the edge of the second surface mount component, wherein a first surface of the first barrier structure is facing the second electrical connectors, and a second surface of the first barrier structure is facing away from the second electrical connectors.

Abstract: The disclosed system and method reduce on-chip power IR drop caused by large write current, to increase the write IO number or improve write throughput and to suppress write voltage ripple at the start and end of a write operation. The disclosed systems and methods are described in relation to stabilizing the bit line voltage for MRAMs, however, the disclosed systems and methods can be used to stabilize the bit line voltage of any memory configuration that draws large currents during short write pulses or, more generally, to selectively assist a power supply generator in supplying adequate power to a load at times of large power consumption.

Abstract: A transmission device capable of control feedback comprises a sender and a receiver. The sender electrically connects to an electronic device through USB type-C for receiving an image signal and sending a control signal. A first processing circuit of the sender converts a network packet into the control signal. A first communication circuit of the sender receives the network packet and sends the image signal. The receiver electrically connects to a display device for sending the image signal and receiving the control signal. A second processing circuit of the receiver encapsulates control signal into the network packet. A second communication circuit of the receiver communicably connects to the first communication circuit to send the network packet and receive the image signal.

Abstract: An integrated circuit structure includes a package component, which further includes a non-porous dielectric layer having a first porosity, and a porous dielectric layer over and contacting the non-porous dielectric layer, wherein the porous dielectric layer has a second porosity higher than the first porosity. A bond pad penetrates through the non-porous dielectric layer and the porous dielectric layer. A dielectric barrier layer is overlying, and in contact with, the porous dielectric layer. The bond pad is exposed through the dielectric barrier layer. The dielectric barrier layer has a planar top surface. The bond pad has a planar top surface higher than a bottom surface of the dielectric barrier layer.

Abstract: The invention discloses a computer aided design system and method for an educational table game. A plurality of predetermined objects, a plurality of predetermined hierarchical subjects, a plurality of predetermined learning contents, a plurality of predetermined game rule templates, a plurality of predetermined game scene templates, and a plurality of predetermined game accessory templates are previously provided. For the educational table games, a selected object is selected from the predetermined objects is selected, and a selected hierarchical subject is selected from the predetermined hierarchical subjects. Then, at least one selected learning content is selected. Next, a set game rule is set. Afterward, a set game scene is set. Then, a set game accessory package file is set. Finally, a game plan file is generated, and the game plan file and the set game accessory package file are output.

Abstract: An apparatus for detecting unsupported utterances in natural language understanding, includes a memory storing instructions, and at least one processor configured to execute the instructions to classify a feature that is extracted from an input utterance of a user, as one of in-domain and out-of-domain (OOD) for a response to the input utterance, obtain an OOD score of the extracted feature, and identify whether the feature is classified as OOD. The at least one processor is further configured to executed the instructions to, based on the feature being identified to be classified as in-domain, identify whether the obtained OOD score is greater than a predefined threshold, and based on the OOD score being identified to be greater than the predefined threshold, re-classify the feature as OOD.

Abstract: A non-woven film for electronic components is provided in the present disclosure. The non-woven film for electronic components includes a polyetherimide substrate and an aerogel. The aerogel is disposed on the polyetherimide substrate. The aerogel has a moisture content between 0.7% and 0.9% and a porosity between 85% and 95%.