Patents by Inventor Yen-Cheng Pan

Yen-Cheng Pan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128232
    Abstract: A semiconductor package includes a first semiconductor die, an encapsulant, a high-modulus dielectric layer and a redistribution structure. The first semiconductor die includes a conductive post in a protective layer. The encapsulant encapsulates the first semiconductor die, wherein the encapsulant is made of a first material. The high-modulus dielectric layer extends on the encapsulant and the protective layer, wherein the high-modulus dielectric layer is made of a second material. The redistribution structure extends on the high-modulus dielectric layer, wherein the redistribution structure includes a redistribution dielectric layer, and the redistribution dielectric layer is made of a third material. The protective layer is made of a fourth material, and a ratio of a Young's modulus of the second material to a Young's modulus of the fourth material is at least 1.5.
    Type: Application
    Filed: December 28, 2023
    Publication date: April 18, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsung-Ding Wang, Yen-Fu Su, Hao-Cheng Hou, Jung-Wei Cheng, Chien-Hsun Lee, Hsin-Yu Pan
  • Publication number: 20240071888
    Abstract: A package structure including a redistribution circuit structure, a wiring substrate, first conductive terminals, an insulating encapsulation, and a semiconductor device is provided. The redistribution circuit structure includes stacked dielectric layers, redistribution wirings and first conductive pads. The first conductive pads are disposed on a surface of an outermost dielectric layer among the stacked dielectric layers, the first conductive pads are electrically connected to outermost redistribution pads among the redistribution wirings by via openings of the outermost dielectric layer, and a first lateral dimension of the via openings is greater than a half of a second lateral dimension of the outermost redistribution pads. The wiring substrate includes second conductive pads. The first conductive terminals are disposed between the first conductive pads and the second conductive pads. The insulating encapsulation is disposed on the surface of the redistribution circuit structure.
    Type: Application
    Filed: August 28, 2022
    Publication date: February 29, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Chang Lin, Yen-Fu Su, Chin-Liang Chen, Wei-Yu Chen, Hsin-Yu Pan, Yu-Min Liang, Hao-Cheng Hou, Chi-Yang Yu
  • Patent number: 4645638
    Abstract: For holding the reactor core in the confining reactor vessel, a support is disclosed that is structurally independent of the vessel, that is dimensionally accurate and stable, and that comprises tandem tension linkages that act redundantly of one another to maintain stabilized core support even in the unlikely event of the complete failure of one of the linkages. The core support has a mounting platform for the reactor core, and unitary structure including a flange overlying the top edge of the reactor vessels, and a skirt and box beams between the flange and platform for establishing one of the linkages. A plurality of tension rods connect between the deck closing the reactor vessel and the platform for establishing the redundant linkage. Loaded Belleville springs flexibly hold the tension rods at the deck and separable bayonet-type connections hold the tension rods at the platform.
    Type: Grant
    Filed: April 26, 1984
    Date of Patent: February 24, 1987
    Assignee: The United States of America as represented by the United States Department of Energy
    Inventors: James P. Burelbach, William J. Kann, Yen-Cheng Pan, James G. Saiveau, Ralph W. Seidensticker