Patents by Inventor Yen-Chung Lin
Yen-Chung Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11968840Abstract: A thin film transistor includes an active layer located over a substrate, a first gate stack including a stack of a first gate dielectric and a first gate electrode and located on a first surface of the active layer, a pair of first contact electrodes contacting peripheral portions of the first surface of the active layer and laterally spaced from each other along a first horizontal direction by the first gate electrode, a second contact electrode contacting a second surface of the active layer that is vertically spaced from the first surface of the active layer, and a pair of second gate stacks including a respective stack of a second gate dielectric and a second gate electrode and located on a respective peripheral portion of a second surface of the active layer.Type: GrantFiled: November 10, 2021Date of Patent: April 23, 2024Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Yong-Jie Wu, Yen-Chung Ho, Hui-Hsien Wei, Chia-Jung Yu, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
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Publication number: 20240096712Abstract: Provided is a semiconductor device includes a gate electrode, a gate dielectric layer, a channel layer, an insulating layer, a first source/drain electrode and a second source/drain electrode, a second dielectric layer, and a stop segment. The gate electrode is located within a first dielectric layer that overlies a substrate. The gate dielectric layer is located over the gate electrode. The channel layer is located on the gate dielectric layer. The insulating layer is located over the channel layer. The first source/drain electrode and the second source/drain electrode are located in the insulating layer, and connected to the channel layer. The second dielectric layer is beside one of the first source/drain electrode and the second source/drain electrode. The stop segment is embedded in the second dielectric layer.Type: ApplicationFiled: January 10, 2023Publication date: March 21, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yu-Wei Jiang, Chieh-Fang Chen, Yen-Chung Ho, Pin-Cheng Hsu, Feng-Cheng Yang, Chung-Te Lin
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Patent number: 11935462Abstract: The present application relates to an electronic device comprising: a display unit, a display driver circuit and a circuit element. The display driver circuit is coupled to the display unit. The circuit element is placed under a display area of the display unit. The circuit element receives a dynamic refresh signal generated by the display driver circuit. The dynamic refresh signal contains a refresh rate information of the display unit. Thereby, the problem that the interference between the display pixels and the circuit element under the display unit cannot be avoided when the refresh rate changes is solved.Type: GrantFiled: December 19, 2022Date of Patent: March 19, 2024Assignee: Sensortek Technology Corp.Inventors: Yen-Chung Lin, Rong-Fong Chen
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Publication number: 20230252936Abstract: The present application relates to an electronic device comprising: a display unit, a display driver circuit and a circuit element. The display driver circuit is coupled to the display unit. The circuit element is placed under a display area of the display unit. The circuit element receives a dynamic refresh signal generated by the display driver circuit. The dynamic refresh signal contains a refresh rate information of the display unit. Thereby, the problem that the interference between the display pixels and the circuit element under the display unit cannot be avoided when the refresh rate changes is solved.Type: ApplicationFiled: December 19, 2022Publication date: August 10, 2023Inventors: YEN-CHUNG LIN, RONG-FONG CHEN
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Patent number: 7592987Abstract: An active TFT circuit structure with current scaling function is disclosed, which includes a current source, a data line, a scan line, a direct current voltage source, capacitors and four transistors, wherein the capacitors form a cascade structure. During the ON-state, the two of the transistors are turn-on based on the voltage provided by the scan line, so that the data current provided by the current source flows through the data line-and the transistor which is one of the opened transistors, thereby arriving an emitting light element and the transistor connected to the emitting light element. When the pixel circuit changes from ON- to OFF-state, the voltage of the node between the storage capacitors reduces due to the feed-through effect of one of storage capacitor, thereby reducing the driving current of the emitting light element. Therefore, it can be achieved the current scaling function.Type: GrantFiled: March 2, 2006Date of Patent: September 22, 2009Assignees: Quanta Display, Inc., National Chiao Tung UniversityInventors: Pei-Ming Chen, Yen-Lin Wei, An-Chih Wang, Yen-Chung Lin, Jian-Zhi Huang, Chia-Feng Yang, Jiun-Shiau Wang, Han-Ping Shieh
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Publication number: 20070057294Abstract: An active TFT circuit structure with current scaling function is disclosed, which includes a current source, a data line, a scan line, a direct current voltage source, capacitors and four transistors, wherein the capacitors form a cascade structure. During the ON-state, the two of the transistors are turn-on based on the voltage provided by the scan line, so that the data current provided by the current source flows the data line and the transistor which is one of the opened transistors, thereby arriving an emitting light element and the transistor connected to the emitting light element. When the pixel circuit changes from ON- to OFF-state, the voltage of the node between the storage capacitors reduces due to the feed-through effect of one of storage capacitor, thereby reducing the driving current of the emitting light element. Therefore, it can be achieved the current scaling function.Type: ApplicationFiled: March 2, 2006Publication date: March 15, 2007Applicants: Quanta Display Inc., National Chiao Tung UniversityInventors: Pei-Ming Chen, Yen-Lin Wei, Ah-Chih Wang, Yen-Chung Lin, Jian-Zhi Huang, Chia-Feng Yang, Jiun-Shiau Wang, Han-Ping Shieh
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Patent number: 7103891Abstract: An invention is disclosed that provides a method for facilitating communication with a Fiber Channel controller. Initially, a data structure is defined that includes a Fiber Channel attribute value, which defines a particular functionality of a Fiber Channel controller. Although the data structure can include a plurality of Fiber Channel attributes, preferably at least one Fiber Channel attribute is defined in the data structure. A user is then enabled to modify the Fiber Channel attribute value. Further, during operation of the Fiber Channel controller, a modification request can be received from a code segment to alter the Fiber Channel attribute. The functionality of the Fiber Channel controller is then altered based on the Fiber Channel attribute value.Type: GrantFiled: October 12, 2000Date of Patent: September 5, 2006Assignee: Adaptec, Inc.Inventors: Shing Mark Lin, Yen-Chung Lin
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Patent number: 7103686Abstract: An invention is disclosed that provides device information using a Fibre Channel network. Initially, device information is obtained for a device coupled to a Fibre Channel based network, and an address database is constructed that includes a device entry for the device. Preferably, the device entry includes a port target identifier and a logical unit identifier for the device, and associates the previously obtained device information with the port target identifier and the logical unit identifier. A request is then received for the device information that typically includes the port target identifier and the logical unit identifier. The device information associated with the port target identifier and the logical unit identifier is then returned in response to the request.Type: GrantFiled: October 12, 2000Date of Patent: September 5, 2006Assignee: Adaptec, Inc.Inventors: Shing Mark Lin, Yen-Chung Lin
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Patent number: 6904115Abstract: A current register unit. A first transistor of a first type, second to sixth transistors of a second type, and first and second capacitors are provided, and an image current signal is stored in the current register unit when a control signal is at a first logic level, and the image current signal is output by the current register unit when the control signal is at a second logic level. An image display device that utilizes the current register unit is also disclosed.Type: GrantFiled: May 10, 2004Date of Patent: June 7, 2005Assignee: Toppoly Optoelectronics Corp.Inventor: Yen-Chung Lin
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Publication number: 20040239600Abstract: A current register unit. A first transistor of a first type, second to sixth transistors of a second type, and first and second capacitors are provided, and an image current signal is stored in the current register unit when a control signal is at a first logic level, and the image current signal is output by the current register unit when the control signal is at a second logic level. An image display device that utilizes the current register unit is also disclosed.Type: ApplicationFiled: May 10, 2004Publication date: December 2, 2004Applicant: Toppoly Optoelectronics Corp.Inventor: Yen-Chung Lin
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Patent number: 6775832Abstract: An invention is disclosed for a layer structure that facilitates configuring a Fiber Channel driver. In one embodiment, the layer structure includes a hardware layer directory that includes code for communicating with a Fiber Channel controller. In addition, a wrapper layer directory is included in the layer structure. The wrapper layer directory includes code for communicating with the code associated with the hardware layer directory, and also includes a wrapper header file that defines a particular value setting in a first state, such as a compiler directive set a particular value. The layer structure further includes a global header directory that defines a group of value settings. The group of value settings is defined for the code associated with each of the hardware directory and the wrapper layer directory. The particular value setting in the first state is also included in the group of value settings.Type: GrantFiled: October 13, 2000Date of Patent: August 10, 2004Assignee: Adaptec, Inc.Inventors: Shing Mark Lin, Yen-Chung Lin, Terence Ma
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Patent number: 6748459Abstract: An invention is disclosed that maps a Fibre Channel address to a Small Computer System Interface (SCSI) address. A data port is detected on a computer network system and a port target identifier is assigned to the detected data port. Next, a device coupled to the data port is detected and a logical unit identifier is assigned to the detected device. In addition, an Arbitrated Loop Physical Address (AL_PA) is obtained for the device. Further, an address database is constructed that includes a device entry for the detected device. The device entry includes the port target identifier and the logical unit identifier that were assigned to the data port and device. In addition, the device entry associates the AL_PA to the port target identifier and the logical unit identifier of the device.Type: GrantFiled: October 12, 2000Date of Patent: June 8, 2004Assignee: Adaptec, Inc.Inventors: Shing Mark Lin, Yen-Chung Lin
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Patent number: 6477629Abstract: Disclosed is an apparatus, a system, a computer readable media, and a method for protecting data of a computer system. The method includes: (a) connecting a peripheral storage device to the computer system; (b) preparing a storage media of the peripheral storage device to be a protection enabled media; (c) selecting a backup set of data stored in a hard drive of the computer system, the backup set of data includes a default set of boot files and operating system files; (d) creating a spare tire backup using file-based copying from the hard-drive of the computer system to the storage media of the peripheral storage device; (e) enabling the peripheral storage device to incrementally copy portions of the backup set of data from the hard drive of the computer system during normal use; and (f) booting the computer system from the peripheral storage device when a failure occurs with the hard drive that disables normal booting.Type: GrantFiled: November 17, 2000Date of Patent: November 5, 2002Assignee: Adaptec, Inc.Inventors: Michael M. Goshey, Guido Maffezzoni, Gilbert Chang-Tying Wu, Yen-Chung Lin, John D. Nguyen, Roger A. Stoller, Kristine N. Luong, Robert S. Hudson, David A. Coleman, Dennis M. Sumners, Thanh T. Bui, Tony Fu, Tony G. Kwan
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Patent number: 6205527Abstract: Disclosed is an apparatus, a system, a computer readable media, and a method for protecting data of a computer system. The method includes: (a) connecting a peripheral storage device to the computer system; (b) preparing a storage media of the peripheral storage device to be a protection enabled media; (c) selecting a backup set of data stored in a hard drive of the computer system, the backup set of data includes a default set of boot files and operating system files; (d) creating a spare tire backup using file-based copying from the hard drive of the computer system to the storage media of the peripheral storage device; (e) enabling the peripheral storage device to incrementally copy portions of the backup set of data from the hard drive of the computer system during normal use; and (f) booting the computer system from the peripheral storage device when a failure occurs with the hard drive that disables normal booting.Type: GrantFiled: July 6, 1998Date of Patent: March 20, 2001Assignee: Adaptec, Inc.Inventors: Michael M. Goshey, Guido Maffezzoni, Gilbert Chang-Tying Wu, Yen-Chung Lin, John D. Nguyen, Roger A. Stoller, Kristine N. Luong, Robert S. Hudson, David A. Coleman, Dennis M. Sumners, Thanh T. Bui, Tony Fu, Tony G. Kwan
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Patent number: 6192456Abstract: A method includes operations for creating and formatting FAT partitions beyond the first gigabyte of a disk having more than one gigabyte of data storage space, when the disk is associated with a controller card that does not include an option-ROM with a BIOS. In particular, the method populates at least one variable of each partition boot sector with a non-F6 value which then is detected to cause the use of the partition LBA for formatting the boot sector, rather than the partition CHS. A computer readable medium can also include program instructions for creating and formatting FAT partitions beyond the first gigabyte of a disk having more than one gigabyte of data storage space, when the disk is associated with a controller card that does not include an option-ROM with a BIOS.Type: GrantFiled: March 30, 1999Date of Patent: February 20, 2001Assignee: Adaptec, Inc.Inventors: Yen-Chung Lin, Thanh Tu Bui
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Patent number: 6105130Abstract: Disclosed is a method for booting a computer system. The computer system includes a first device and a second device which, during initialization of the computer system, are each respectively automatically associated with a unique identification used in a computer generated request to indicate whether the first device or the second device is to respond to the computer generated request. The method includes the act modifying each unique identification that is associated with the first device and the second device of the computer system. In this manner, the second device responds to the computer generated request for the first device, and the first device responds to the computer generated request for the second device.Type: GrantFiled: January 30, 1998Date of Patent: August 15, 2000Assignee: Adaptec, Inc.Inventors: Gilbert Chang-Tying Wu, Yen-Chung Lin