Patents by Inventor Yen-Fei Lin

Yen-Fei Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7446056
    Abstract: The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the purpose, of nitrogen at a flow rate of at least about 240 standard liters per minute (slm). The instant invention further relates to a method for inhibiting the formation of a polysilicon seed in a furnace, which includes the treatment as noted above. The invention also relates to a method for forming a polysilicon layer, including: forming a silicon oxide layer on a substrate, the silicon oxide layer having a plurality of oxygen molecules therein; exposing the silicon oxide layer to a predetermined amount of nitrogen-containing gas in a furnace, whereby a plurality of nitrogen molecules in the nitrogen-containing gas replaces at least part of the oxygen molecules in the silicon oxide layer; and forming a polysilicon layer on the silicon oxide layer.
    Type: Grant
    Filed: December 1, 2005
    Date of Patent: November 4, 2008
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yao-Hui Huang, Tung-Li Lee, Chih-Hao Lin, Yen-Fei Lin, James Sun, Chen Pu-Fang, David Huang
  • Publication number: 20080041758
    Abstract: A wafer carrier. The wafer carrier includes a container and a plate, wherein the container has an inner wall and the plate is disposed in the vicinity of the inner wall of an upper portion of the container.
    Type: Application
    Filed: August 16, 2006
    Publication date: February 21, 2008
    Inventors: Yen-Fei Lin, Hui-Wen Chou, Wen-Yu Ku, Pu-Fang Chen, Tung-Li Lee, Jih-Hwa Wang
  • Publication number: 20060134926
    Abstract: The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the purpose, of nitrogen at a flow rate of at least about 240 standard liters per minute (slm). The instant invention further relates to a method for inhibiting the formation of a polysilicon seed in a furnace, which includes the treatment as noted above. The invention also relates to a method for forming a polysilicon layer, including: forming a silicon oxide layer on a substrate, the silicon oxide layer having a plurality of oxygen molecules therein; exposing the silicon oxide layer to a predetermined amount of nitrogen-containing gas in a furnace, whereby a plurality of nitrogen molecules in the nitrogen-containing gas replaces at least part of the oxygen molecules in the silicon oxide layer; and forming a polysilicon layer on the silicon oxide layer.
    Type: Application
    Filed: December 1, 2005
    Publication date: June 22, 2006
    Inventors: Yao-Hui Huang, Tung-Li Lee, Chih-Hao Lin, Yen-Fei Lin, James Sun, Chen Pu-Fang, David Huang
  • Publication number: 20050233481
    Abstract: A method of fabricating a stabilized TiN control wafer comprising the following steps. A silicon substrate is provided having a silicon oxide layer formed thereover. An initial TiN layer is formed over the silicon oxide layer. The silicon substrate is placed in an atmosphere having ambient oxygen for from about 22 to 26 hours to form a rested TiN layer. The rested TiN layer is heated at a temperature of from about 115 to 125° C. for from about 85 to 95 seconds to form a heat treated TiN layer, whereby the heat treated TiN layer is stabilized to form the stabilized TiN control wafer.
    Type: Application
    Filed: June 21, 2005
    Publication date: October 20, 2005
    Inventors: Yen-Fei Lin, Yueh-mao Sun, Wei-Jen Wen
  • Patent number: 6951767
    Abstract: A method of fabricating a stabilized TiN control wafer comprising the following steps. A silicon substrate is provided having a silicon oxide layer formed thereover. An initial TiN layer is formed over the silicon oxide layer. The silicon substrate is placed in an atmosphere having ambient oxygen for from about 22 to 26 hours to form a rested TiN layer. The rested TiN layer is heated at a temperature of from about 115 to 125° C. for from about 85 to 95 seconds to form a heat treated TiN layer, whereby the heat treated TiN layer is stabilized to form the stabilized TiN control wafer.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: October 4, 2005
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Fei Lin, Yueh-mao Sun, Wei-Jen Wen
  • Publication number: 20040224533
    Abstract: The present invention relates to a method for increasing the grain size of a polysilicon layer, which includes exposing a silicon oxide wafer in a deposition chamber to an amount, effective for the purpose, of nitrogen at a flow rate of at least about 240 standard liters per minute (slm).
    Type: Application
    Filed: May 7, 2003
    Publication date: November 11, 2004
    Inventors: Yao-Hui Huang, Tung-Li Lee, Chih-Hao Lin, Yen-Fei Lin, James Sun, Bu-Fun Chen, David Huang