Patents by Inventor Yen-Feng Chao

Yen-Feng Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7228114
    Abstract: A power detection circuit is described that provides for a wide dynamic range power detection. The circuit incorporates a coupler to sample a transmitted or received power. Such sampled power is then directed to a detector diode configured to generate a voltage from its rectified current. Such voltage after optional filtering and buffering is directed to multiple amplifiers wherein each amplifier has a distinct associated gain. For improved noise immunity, a differential output amplifier may be used. For low power levels, the output of an amplifier with a large gain is directed to an analog-to-digital converter (ADC), wherein the analog voltage is quantized into a digital value. As power is increased, the power of an amplifier stage with a small gain can then be directed to the ADC such that saturation of the ADC is avoided. Hysteresis is implemented so as to avoid undesirable and unnecessary rapid switching.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: June 5, 2007
    Assignee: Harris Stratex Networks Operating Corporation
    Inventors: Yen-Feng Chao, Cuong Nguyen
  • Publication number: 20040235436
    Abstract: A power detection circuit is described that provides for a wide dynamic range power detection. The circuit incorporates a coupler to sample a transmitted or received power. Such sampled power is then directed to a detector diode configured to generate a voltage from its rectified current. Such voltage after optional filtering and buffering is directed to multiple amplifiers wherein each amplifier has a distinct associated gain. For improved noise immunity, a differential output amplifier may be used. For low power levels, the output of an amplifier with a large gain is directed to an analog-to-digital converter (ADC), wherein the analog voltage is quantized into a digital value. As power is increased, the power of an amplifier stage with a small gain can then be directed to the ADC such that saturation of the ADC is avoided. Hysteresis is implemented so as to avoid undesirable and unnecessary rapid switching.
    Type: Application
    Filed: May 21, 2003
    Publication date: November 25, 2004
    Applicant: Stratex Networks, Inc.
    Inventors: Yen-Feng Chao, Cuong Nguyen