Patents by Inventor YEN-HAO HUANG
YEN-HAO HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240119283Abstract: A method of performing automatic tuning on a deep learning model includes: utilizing an instruction-based learned cost model to estimate a first type of operational performance metrics based on a tuned configuration of layer fusion and tensor tiling; utilizing statistical data gathered during a compilation process of the deep learning model to determine a second type of operational performance metrics based on the tuned configuration of layer fusion and tensor tiling; performing an auto-tuning process to obtain a plurality of optimal configurations based on the first type of operational performance metrics and the second type of operational performance metrics; and configure the deep learning model according to one of the plurality of optimal configurations.Type: ApplicationFiled: October 6, 2023Publication date: April 11, 2024Applicant: MEDIATEK INC.Inventors: Jui-Yang Hsu, Cheng-Sheng Chan, Jen-Chieh Tsai, Huai-Ting Li, Bo-Yu Kuo, Yen-Hao Chen, Kai-Ling Huang, Ping-Yuan Tseng, Tao Tu, Sheng-Je Hung
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Publication number: 20240087915Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.Type: ApplicationFiled: November 22, 2023Publication date: March 14, 2024Inventors: Yen-Hao HUANG, Chun-Yi CHEN, I-Shi WANG, Yin-Tun CHOU, Yuan-Hsin CHI, Sheng-Yuan LIN
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Patent number: 11917144Abstract: Various schemes for realizing efficient in-loop filtering are described, manifested in low latency and reduced hardware cost for an in-loop filter comprising at least two filtering stages. An apparatus receives pixel data of a current block of a picture and one or more neighboring blocks thereof, based on which the apparatus performs a filtering operation and generates a filtered block that includes completely filtered sub-blocks and partially filtered sub-blocks. The apparatus further outputs an output block that includes the completely filtered sub-blocks as well as a respective portion of each of the partially filtered sub-blocks, wherein the respective portion is adjacent to one of the completely filtered sub-blocks.Type: GrantFiled: June 19, 2022Date of Patent: February 27, 2024Assignee: MediaTek Inc.Inventors: Yueh-Lin Wu, Min-Hao Chiu, Yen-Chieh Huang
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Patent number: 11862482Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.Type: GrantFiled: May 26, 2021Date of Patent: January 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Yen-Hao Huang, Chun-Yi Chen, I-Shi Wang, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
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Patent number: 11694732Abstract: Systems and methods for processing commands at a random access memory. A series of commands are received to read data from the random access memory or to write data to the random access memory. The random access memory can process commands at a first rate when the series of commands matches a pattern, and at a second, slower, rate when the series of commands does not match the pattern. A determination is made as to whether the series of commands matches the pattern based on at least a current command and a prior command in the series of commands. A ready signal is asserted when said determining determines that the series of commands matches the pattern, where the random access memory is configured to receive and process commands faster than the second rate when the pattern is matched and the ready signal is asserted over a period of multiple commands.Type: GrantFiled: May 2, 2022Date of Patent: July 4, 2023Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hsin-Cheng Chen, Jung-Rung Jiang, Yen-Hao Huang
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Publication number: 20220367405Abstract: Methods and systems for improving fusion bonding are disclosed. Plasma treatment is performed on a substrate prior to the fusion bonding, which leaves residual charge on the substrate to be fusion bonded. The residual charge is usually dissipated through an electrically conductive silicone cushion on a loading pin. In the methods, the amount of residual voltage on a test silicon wafer is measured. If the residual voltage is too high, this indicates the usable lifetime of the silicone cushion has passed, and the electrically conductive silicone cushion is replaced. This ensures the continued dissipation of residual charge during use in production, improving the quality of fusion bonds between substrates.Type: ApplicationFiled: February 8, 2022Publication date: November 17, 2022Inventors: Hong-Ta Kuo, Yen Hao Huang, I-Shi Wang, Ming-Yi Shen, Tzu-Ping Yang, Hsing-Yu Wang, Huang-Liang Lin, Yin-Tun Chou, Yuan-Hsin Chi, Sheng-Yuan Lin
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Publication number: 20220293436Abstract: A bonding tool includes a gas supply line that may extend directly between valves associated with one or more gas supply tanks and a processing chamber such that gas supply line is uninterrupted without any intervening valves or other types of structures that might otherwise cause a pressure buildup in the gas supply line between the processing chamber and the valves associated with the one or more gas supply tanks. The pressure in the gas supply line may be maintained at or near the pressure in the processing chamber so that gas provided to the processing chamber through the gas supply line does not cause a pressure imbalance in the processing chamber, which might otherwise cause early or premature contact between semiconductor substrates that are to be bonded in the processing chamber.Type: ApplicationFiled: May 26, 2021Publication date: September 15, 2022Inventors: Yen-Hao HUANG, Chun-Yi CHEN, I-Shi WANG, Yin-Tun CHOU, Yuan-Hsin CHI, Sheng-Yuan LIN
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Publication number: 20220254392Abstract: Systems and methods for processing commands at a random access memory. A series of commands are received to read data from the random access memory or to write data to the random access memory. The random access memory can process commands at a first rate when the series of commands matches a pattern, and at a second, slower, rate when the series of commands does not match the pattern. A determination is made as to whether the series of commands matches the pattern based on at least a current command and a prior command in the series of commands. A ready signal is asserted when said determining determines that the series of commands matches the pattern, where the random access memory is configured to receive and process commands faster than the second rate when the pattern is matched and the ready signal is asserted over a period of multiple commands.Type: ApplicationFiled: May 2, 2022Publication date: August 11, 2022Inventors: Hsin-Cheng Chen, Jung-Rung Jiang, Yen-Hao Huang
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Patent number: 11411571Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.Type: GrantFiled: May 26, 2021Date of Patent: August 9, 2022Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sandeep Kumar Goel, Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang
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Patent number: 11322185Abstract: Systems and methods for processing commands at a random access memory. A series of commands are received to read data from the random access memory or to write data to the random access memory. The random access memory can process commands at a first rate when the series of commands matches a pattern, and at a second, slower, rate when the series of commands does not match the pattern. A determination is made as to whether the series of commands matches the pattern based on at least a current command and a prior command in the series of commands. A ready signal is asserted when said determining determines that the series of commands matches the pattern, where the random access memory is configured to receive and process commands faster than the second rate when the pattern is matched and the ready signal is asserted over a period of multiple commands.Type: GrantFiled: December 10, 2020Date of Patent: May 3, 2022Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hsin-Cheng Chen, Jung-Rung Jiang, Yen-Hao Huang
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Publication number: 20210281268Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.Type: ApplicationFiled: May 26, 2021Publication date: September 9, 2021Inventors: Sandeep Kumar GOEL, Ji-Jan CHEN, Stanley JOHN, Yun-Han LEE, Yen-Hao HUANG
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Patent number: 11025261Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.Type: GrantFiled: June 5, 2020Date of Patent: June 1, 2021Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sandeep Kumar Goel, Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang
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Publication number: 20210090618Abstract: Systems and methods for processing commands at a random access memory. A series of commands are received to read data from the random access memory or to write data to the random access memory. The random access memory can process commands at a first rate when the series of commands matches a pattern, and at a second, slower, rate when the series of commands does not match the pattern. A determination is made as to whether the series of commands matches the pattern based on at least a current command and a prior command in the series of commands. A ready signal is asserted when said determining determines that the series of commands matches the pattern, where the random access memory is configured to receive and process commands faster than the second rate when the pattern is matched and the ready signal is asserted over a period of multiple commands.Type: ApplicationFiled: December 10, 2020Publication date: March 25, 2021Inventors: Hsin-Cheng Chen, Jung-Rung Jiang, Yen-Hao Huang
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Patent number: 10867642Abstract: Systems and methods for processing commands at a random access memory. A series of commands are received to read data from the random access memory or to write data to the random access memory. The random access memory can process commands at a first rate when the series of commands matches a pattern, and at a second, slower, rate when the series of commands does not match the pattern. A determination is made as to whether the series of commands matches the pattern based on at least a current command and a prior command in the series of commands. A ready signal is asserted when said determining determines that the series of commands matches the pattern, where the random access memory is configured to receive and process commands faster than the second rate when the pattern is matched and the ready signal is asserted over a period of multiple commands.Type: GrantFiled: November 2, 2016Date of Patent: December 15, 2020Assignee: Taiwan Semiconductor Manufacturing Company LimitedInventors: Hsin-Cheng Chen, Jung-Rung Jiang, Yen-Hao Huang
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Patent number: 10804066Abstract: A method for routing data for an e-beam writer includes, with a switching device of the e-beam writer, receiving a packet. The method further includes, with a scheduling engine of the switching device, routing the packet to one of a plurality of output buffers, wherein the routing is based on availabilities of the plurality of output buffers and vacancy levels of memory devices associated with the plurality of output buffers. The method further includes, with the switching device, outputting the packet from an output port associated with a memory device to which the packet is routed.Type: GrantFiled: October 14, 2019Date of Patent: October 13, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
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Publication number: 20200304133Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.Type: ApplicationFiled: June 5, 2020Publication date: September 24, 2020Inventors: Sandeep Kumar GOEL, Ji-Jan CHEN, Stanley JOHN, Yun-Han LEE, Yen-Hao HUANG
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Patent number: 10680627Abstract: A clock distribution circuit configured to output a clock signal includes a first circuit configured to use a reference clock signal to provide first and second reference signals, wherein the second reference signal indicates whether the first reference signal is locked with the reference clock signal; a second circuit configured to use the reference clock signal to provide an output signal and an indication signal indicative whether the output signal is locked with the reference clock signal; and a monitor circuit, coupled to the first and second circuits, and configured to use at least one of the first reference signal, the second reference signal, the output signal, and the indication signal to determine whether the second circuit is functioning correctly.Type: GrantFiled: April 2, 2019Date of Patent: June 9, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Sandeep Kumar Goel, Ji-Jan Chen, Stanley John, Yun-Han Lee, Yen-Hao Huang
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Publication number: 20200043692Abstract: A method for routing data for an e-beam writer includes, with a switching device of the e-beam writer, receiving a packet. The method further includes, with a scheduling engine of the switching device, routing the packet to one of a plurality of output buffers, wherein the routing is based on availabilities of the plurality of output buffers and vacancy levels of memory devices associated with the plurality of output buffers. The method further includes, with the switching device, outputting the packet from an output port associated with a memory device to which the packet is routed.Type: ApplicationFiled: October 14, 2019Publication date: February 6, 2020Inventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
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Patent number: 10446358Abstract: A method includes receiving, by an input buffer of a switching device, a packet, determining, by a scheduling engine of the switching device, a destination output buffer for the packet, receiving, by the scheduling engine of the switching device, an availability of the destination output buffer and a vacancy level of a memory device that is associated with the destination output buffer, and based on the availability of the destination output buffer and the vacancy level of the memory device, determining, by the scheduling engine of the switching device, a routing destination of the packet. The routing destination includes the input buffer, the destination output buffer, and the memory device.Type: GrantFiled: August 14, 2018Date of Patent: October 15, 2019Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTDInventors: Jensen Yang, Shy-Jay Lin, Yen-Hao Huang
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Patent number: D1023047Type: GrantFiled: September 14, 2023Date of Patent: April 16, 2024Assignee: AI BIOLECTRONIC HEALTHTECH CO. LIMITEDInventors: Yen-Yi Ho, Huei-Yun Gong, Yen-Yun Huang, Po-Hao Huang