Patents by Inventor Yen-Hsun Lin
Yen-Hsun Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250064345Abstract: A gait evaluating system including a processor is provided. The processor identifies whether a gait type of the user belongs to a normal gait, a non-neuropathic gait or a neuropathic gait based on step feature values of a user and walking limb feature values of the user. In response to that the gait type of the user belongs to the non-neuropathic gait, the processor controls the display panel to display a first auxiliary information, a second auxiliary information, and a third auxiliary information. The first auxiliary information indicates a potential sarcopenia of the user. The second auxiliary information indicates a dietary guideline for muscle building and muscle strengthening. The third auxiliary information shows a motion instruction video for regaining or maintaining muscle strength of the user.Type: ApplicationFiled: October 18, 2024Publication date: February 27, 2025Applicant: Industrial Technology Research InstituteInventors: Je-Ping Hu, Keng-Hsun Lin, Shih-Fang Yang Mao, Pin-Chou Li, Jian-Hong Wu, Szu-Ju Li, Hui-Yu Cho, Yu-Chang Chen, Yen-Nien Lu, Jyun-Siang Hsu, Nien-Ya Lee, Kuan-Ting Ho, Ming-Chieh Tsai, Ching-Yu Huang
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Publication number: 20250029875Abstract: A method for forming a packaging structure is provided. The method includes providing a first substrate and a second substrate. The first substrate includes a first base material and a first dielectric layer on the first base material, and the second substrate includes a second base material and a second dielectric layer on the second base material. The second base material has a first through hole. The first dielectric layer and the second dielectric layer have a first hole and a second hole, respectively. The method further includes connecting the second substrate to the first substrate in such a way that the second dielectric layer is connected to the first dielectric layer to form a first composite structure; thinning the top surface of the first composite structure to expose the first through hole; and forming a first conductive member in the first through hole.Type: ApplicationFiled: March 28, 2024Publication date: January 23, 2025Inventors: Yen-Jui CHU, Yu-Jen LIN, Min-Hsun LIN, Chung-Ming CHENG
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Patent number: 12194566Abstract: A method for producing graphene, configured for forming a graphene layer on a surface of an object. The method includes steps of: depositing a poly-p-xylene material layer on the surface: and converting the poly-p-xylene material layer into a graphene layer by using a laser sintering process or a plasma-assisted sintering process.Type: GrantFiled: March 3, 2023Date of Patent: January 14, 2025Assignee: ASUSTEK COMPUTER INC.Inventors: Yun-Wei Tsai, Hsien-Yeh Chen, Shu-Man Hu, Chin-Yun Lee, Yi-Chang Wu, Yen-Hsun Lin, Kuo-Wei Tsao, Chi-Liang Tsai
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Publication number: 20240181568Abstract: A method for producing graphene, configured for forming a graphene layer on a surface of an object. The method includes steps of: depositing a poly-p-xylene material layer on the surface: and converting the poly-p-xylene material layer into a graphene layer by using a laser sintering process or a plasma-assisted sintering process.Type: ApplicationFiled: March 3, 2023Publication date: June 6, 2024Inventors: Yun-Wei TSAI, Hsien-Yeh CHEN, Shu-Man HU, Chin-Yun LEE, Yi-Chang WU, Yen-Hsun LIN, Kuo-Wei TSAO, Chi-Liang TSAI
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Patent number: 11662515Abstract: A light guiding device is applied to an indication apparatus with a lighting function. The light guiding device includes a light guiding component and a piercing hole structure. The light guiding component has an incident surface and an emergent surface. The piercing hole structure is disposed between the incident surface and the emergent surface. An inner wall of the piercing hole structure includes at least one arc surface portion and at least one plane surface portion. Alight beam from the incident surface can be turned to a first angle via the arc surface portion, and the light beam can be turned to a second angle via the plane surface portion, so as to evenly project the light beam onto the emergent surface. A dimension of the emergent surface is greater than a dimension of the incident surface, and the first angle is greater than the second angle.Type: GrantFiled: January 9, 2019Date of Patent: May 30, 2023Assignee: Wistron CorporationInventors: Qi-Hong Yang, Yen-Hsun Lin
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Patent number: 11615955Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.Type: GrantFiled: August 24, 2020Date of Patent: March 28, 2023Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Bo-Yu Yang, Minghwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin, Hsien-Wen Wan, Chao Kai Cheng, Kuan Chieh Lu
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Patent number: 11201055Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer on a substrate, forming a high-? dielectric layer directly on the semiconductor layer as formed, and annealing the semiconductor layer, the high-dielectric layer, and the substrate. The semiconductor layer is a Group III-V compound semiconductor.Type: GrantFiled: September 15, 2017Date of Patent: December 14, 2021Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Chien-Hua Fu, Keng-Yung Lin, Yen-Hsun Lin, Kuanhsiung Chen, Juei-Nai Kwo, Minghwei Hong
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Patent number: 11114301Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, and source/drain regions. The gate structure comprises an yttrium oxide layer over the semiconductor substrate, an aluminum oxide layer over the yttrium oxide layer, and a gate electrode on the aluminum oxide layer. The source/drain regions are on the semiconductor substrate and on opposite sides of the gate structure.Type: GrantFiled: August 3, 2020Date of Patent: September 7, 2021Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Ming-Hwei Hong, Juei-Nai Kwo, Yen-Hsun Lin, Keng-Yung Lin, Bo-Yu Yang, Hsien-Wen Wan
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Patent number: 11081339Abstract: A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y2O3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.Type: GrantFiled: April 24, 2019Date of Patent: August 3, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuanhsiung Chen, Minghwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin
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Publication number: 20200388490Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.Type: ApplicationFiled: August 24, 2020Publication date: December 10, 2020Inventors: Bo-Yu YANG, Minghwei HONG, Jueinai KWO, Yen-Hsun LIN, Keng-Yung LIN, Hsien-Wen WAN, Chao Kai CHENG, Kuan Chieh LU
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Publication number: 20200365407Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, and source/drain regions. The gate structure comprises an yttrium oxide layer over the semiconductor substrate, an aluminum oxide layer over the yttrium oxide layer, and a gate electrode on the aluminum oxide layer. The source/drain regions are on the semiconductor substrate and on opposite sides of the gate structure.Type: ApplicationFiled: August 3, 2020Publication date: November 19, 2020Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Ming-Hwei HONG, Juei-Nai KWO, Yen-Hsun LIN, Keng-Yung LIN, Bo-Yu YANG, Hsien-Wen WAN
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Patent number: 10755924Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.Type: GrantFiled: April 14, 2017Date of Patent: August 25, 2020Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Bo-Yu Yang, Minghwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin, Hsien-Wen Wan, Chao Kai Cheng, Kuan Chieh Lu
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Patent number: 10748774Abstract: A method for manufacturing a semiconductor device includes forming a first high-k dielectric layer on a semiconductor substrate; forming a second high-k dielectric layer on the first high-k dielectric layer, in which the second high-k dielectric layer includes a material different from a material of the first high-k dielectric layer; annealing the first and second high-k dielectric layers, such that the first and second high-k dielectric layers are inter-diffused; and forming a gate electrode over the second high-k dielectric layer.Type: GrantFiled: November 14, 2018Date of Patent: August 18, 2020Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Ming-Hwei Hong, Juei-Nai Kwo, Yen-Hsun Lin, Keng-Yung Lin, Bo-Yu Yang, Hsien-Wen Wan
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Publication number: 20200103579Abstract: A light guiding device is applied to an indication apparatus with a lighting function. The light guiding device includes a light guiding component and a piercing hole structure. The light guiding component has an incident surface and an emergent surface. The piercing hole structure is disposed between the incident surface and the emergent surface. An inner wall of the piercing hole structure includes at least one arc surface portion and at least one plane surface portion. Alight beam from the incident surface can be turned to a first angle via the arc surface portion, and the light beam can be turned to a second angle via the plane surface portion, so as to evenly project the light beam onto the emergent surface. A dimension of the emergent surface is greater than a dimension of the incident surface, and the first angle is greater than the second angle.Type: ApplicationFiled: January 9, 2019Publication date: April 2, 2020Inventors: Qi-Hong Yang, Yen-Hsun Lin
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Publication number: 20190252184Abstract: A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y2O3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.Type: ApplicationFiled: April 24, 2019Publication date: August 15, 2019Inventors: Kuanhsiung Chen, Minghwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin
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Publication number: 20190164767Abstract: A method for manufacturing a semiconductor device includes forming a first high-k dielectric layer on a semiconductor substrate; forming a second high-k dielectric layer on the first high-k dielectric layer, in which the second high-k dielectric layer includes a material different from a material of the first high-k dielectric layer; annealing the first and second high-k dielectric layers, such that the first and second high-k dielectric layers are inter-diffused; and forming a gate electrode over the second high-k dielectric layer.Type: ApplicationFiled: November 14, 2018Publication date: May 30, 2019Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., NATIONAL TAIWAN UNIVERSITYInventors: Ming-Hwei HONG, Juei-Nai KWO, Yen-Hsun LIN, Keng-Yung LIN, Bo-Yu YANG, Hsien-Wen WAN
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Patent number: 10283349Abstract: A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y2O3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.Type: GrantFiled: May 27, 2016Date of Patent: May 7, 2019Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Kuanhsiung Chen, Minghwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin
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Publication number: 20180151356Abstract: A method for manufacturing a semiconductor device includes forming a semiconductor layer on a substrate, forming a high-? dielectric layer directly on the semiconductor layer as formed, and annealing the semiconductor layer, the high-dielectric layer, and the substrate. The semiconductor layer is a Group III-V compound semiconductor.Type: ApplicationFiled: September 15, 2017Publication date: May 31, 2018Inventors: Chien-Hua FU, Keng-Yung LIN, Yen-Hsun LIN, Kuanhsiung CHEN, Juei-Nai KWO, Minghwei HONG
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Publication number: 20170352539Abstract: A method for forming a material having a Perovskite single crystal structure includes alternately growing, on a substrate, each of a plurality of first layers and each of a plurality of second layers having compositions different from the plurality of first layers and forming a material having a Perovskite single crystal structure by annealing the plurality of first layers and the plurality of second layers.Type: ApplicationFiled: April 14, 2017Publication date: December 7, 2017Inventors: Bo-Yu YANG, Minghwei HONG, Jueinai KWO, Yen-Hsun LIN, Keng-Yung LIN, Hsien-Wen WAN, Chao Kai CHENG, Kuan Chieh LU
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Publication number: 20170345646Abstract: A substrate with a (001) orientation is provided. A gallium arsenide (GaAs) layer is epitaxially grown on the substrate. The GaAs layer has a reconstruction surface that is a 4×6 reconstruction surface, a 2×4 reconstruction surface, a 3×2 reconstruction surface, a 2×1 reconstruction surface, or a 4×4 reconstruction surface. Via an atomic layer deposition process, a single-crystal structure yttrium oxide (Y2O3) layer is formed on the reconstruction surface of the GaAs layer. The atomic layer deposition process includes water or ozone gas as an oxygen source precursor and a cyclopentadienyl-type compound as an yttrium source precursor.Type: ApplicationFiled: May 27, 2016Publication date: November 30, 2017Inventors: Kuanhsiung Chen, Mingwei Hong, Jueinai Kwo, Yen-Hsun Lin, Keng-Yung Lin