Patents by Inventor YEN HUI LEE

YEN HUI LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240385523
    Abstract: Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MaRbXc, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1?a?2, b?1, c?1, and b+c?5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Cheng LIU, Yi-Chen KUO, Jia-Lin WEI, Ming-Hui WENG, Yen-Yu CHEN, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
  • Publication number: 20240385514
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Application
    Filed: July 26, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Hui WENG, Chen-Yu LIU, Chih-Cheng LIU, Yi-Chen KUO, Jia-Lin WEI, Yen-Yu CHEN, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
  • Patent number: 12135501
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Grant
    Filed: August 3, 2023
    Date of Patent: November 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Ming-Hui Weng, Chen-Yu Liu, Chih-Cheng Liu, Yi-Chen Kuo, Jia-Lin Wei, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
  • Publication number: 20240355623
    Abstract: A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Application
    Filed: July 2, 2024
    Publication date: October 24, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Chen KUO, Chih-Cheng LIU, Ming-Hui WENG, Jia-Lin WEI, Yen-Yu CHEN, Jr-Hung LI, Yahru CHENG, Chi-Ming YANG, Tze-Liang LEE, Ching-Yu CHANG
  • Publication number: 20240337951
    Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.
    Type: Application
    Filed: June 17, 2024
    Publication date: October 10, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Cheng CHEN, Chia-Jen CHEN, Hsin-Chang LEE, Shih-Ming CHANG, Tran-Hui SHEN, Yen-Cheng HO, Chen-Shao HSU
  • Patent number: 12094761
    Abstract: An embodiment is a structure including a first fin over a substrate, a second fin over the substrate, the second fin being adjacent the first fin, an isolation region surrounding the first fin and the second fin, a gate structure along sidewalls and over upper surfaces of the first fin and the second fin, the gate structure defining channel regions in the first fin and the second fin, a source/drain region on the first fin and the second fin adjacent the gate structure, and an air gap separating the source/drain region from a top surface of the substrate.
    Type: Grant
    Filed: June 28, 2023
    Date of Patent: September 17, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yen-Ru Lee, Chii-Horng Li, Chien-I Kuo, Li-Li Su, Chien-Chang Su, Heng-Wen Ting, Jung-Chi Tai, Che-Hui Lee, Ying-Wei Li
  • Publication number: 20240282577
    Abstract: A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.
    Type: Application
    Filed: April 29, 2024
    Publication date: August 22, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Yu CHEN, Chih-Cheng LIU, Yi-Chen KUO, Jr-Hung LI, Tze-Liang LEE, Ming-Hui WENG, Yahru CHENG
  • Patent number: 12057315
    Abstract: A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.
    Type: Grant
    Filed: May 31, 2023
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yi-Chen Kuo, Chih-Cheng Liu, Ming-Hui Weng, Jia-Lin Wei, Yen-Yu Chen, Jr-Hung Li, Yahru Cheng, Chi-Ming Yang, Tze-Liang Lee, Ching-Yu Chang
  • Patent number: 12038693
    Abstract: In a method of manufacturing a photo mask for lithography, circuit pattern data are acquired. A pattern density, which is a total pattern area per predetermined area, is calculated from the circuit pattern data. Dummy pattern data for areas having pattern density less than a threshold density are generated. Mask drawing data is generated from the circuit pattern data and the dummy pattern data. By using an electron beam from an electron beam lithography apparatus, patterns are drawn according to the mask drawing data on a resist layer formed on a mask blank substrate. The drawn resist layer is developed using a developing solution. Dummy patterns included in the dummy pattern data are not printed as a photo mask pattern when the resist layer is exposed with the electron beam and is developed.
    Type: Grant
    Filed: May 15, 2023
    Date of Patent: July 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chien-Cheng Chen, Chia-Jen Chen, Hsin-Chang Lee, Shih-Ming Chang, Tran-Hui Shen, Yen-Cheng Ho, Chen-Shao Hsu
  • Patent number: 12041771
    Abstract: The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot; performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: July 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yen-Jou Wu, Chih-Ming Lee, Keng-Ying Liao, Ping-Pang Hsieh, Su-Yu Yeh, Hsin-Hui Lin, Yu-Liang Wang
  • Publication number: 20220040546
    Abstract: A bat extending along an imaginary axis includes a top end, a front segment configured to hit a ball, an intermediate segment, and a rear segment configured to be hold. An annular groove that encircles the axis is disposed between the top end and the front segment or between the front segment and the intermediate segment on a surface of the bat. The groove has an empty space communicating with an exterior.
    Type: Application
    Filed: August 4, 2020
    Publication date: February 10, 2022
    Inventor: YEN HUI LEE