Abstract: The disclosed embodiments provide a system for streamlining machine learning. During operation, the system determines a resource overhead for a baseline version of a machine learning model that uses a set of features to produce entity rankings and a number of features to be removed to lower the resource overhead to a target resource overhead. Next, the system calculates importance scores for the features, wherein each importance score represents an impact of a corresponding feature on the entity rankings. The system then identifies a first subset of the features to be removed as the number of features with lowest importance scores and trains a simplified version of the machine learning model using a second subset of the features that excludes the first subset of the features. Finally, the system executes the simplified version to produce new entity rankings.

Abstract: The disclosed embodiments provide a system for streamlining machine learning. During operation, the system determines a resource overhead for a baseline version of a machine learning model that uses a set of features to produce entity rankings and a number of features to be removed to lower the resource overhead to a target resource overhead. Next, the system calculates importance scores for the features, wherein each importance score represents an impact of a corresponding feature on the entity rankings. The system then identifies a first subset of the features to be removed as the number of features with lowest importance scores and trains a simplified version of the machine learning model using a second subset of the features that excludes the first subset of the features. Finally, the system executes the simplified version to produce new entity rankings.

Abstract: A method for transmitting and receiving a message is provided. The method includes steps of providing a bridge device having a bridge hardware address and a first end, receiving a first message including a first hardware address, a first protocol address and a second protocol address from the first end, recording the first hardware address and the first protocol address on a table, replacing the first hardware address with the bridge hardware address, transmitting the first message to a second end having a second hardware address corresponding to the second protocol address; transmitting a second message including the first protocol address, the second protocol address, the bridge hardware address, and the second hardware address from the second end to the bridge device, replacing the bridge hardware address with the first hardware address according to the table; and transmitting the second message to the first end.

Abstract: A method for transmitting and receiving a message is provided. The method includes steps of providing a bridge device having a bridge hardware address and a first end, receiving a first message including a first hardware address, a first protocol address and a second protocol address from the first end, recording the first hardware address and the first protocol address on a table, replacing the first hardware address with the bridge hardware address, transmitting the first message to a second end having a second hardware address corresponding to the second protocol address; transmitting a second message including the first protocol address, the second protocol address, the bridge hardware address, and the second hardware address from the second end to the bridge device, replacing the bridge hardware address with the first hardware address according to the table; and transmitting the second message to the first end.

Abstract: A method for transmitting and receiving a message is provided. The method includes steps of providing a bridge device having a bridge hardware address and a first end, receiving a first message including a first hardware address, a first protocol address and a second protocol address from the first end, recording the first hardware address and the first protocol address on a table, replacing the first hardware address with the bridge hardware address, transmitting the first message to a second end having a second hardware address corresponding to the second protocol address; transmitting a second message including the first protocol address, the second protocol address, the bridge hardware address, and the second hardware address from the second end to the bridge device, replacing the bridge hardware address with the first hardware address according to the table; and transmitting the second message to the first end.

Abstract: The present invention relates to a method for forming a magnetic layer of magnetic random access memory. In short, the method comprises following steps: providing a substrate; forming metal structures on substrate; forming a stop layer on substrate and mostly conformally covers metal structures; forming a buffer layer which mostly conformally covers stop layer; forming a dielectric layer on buffer layer where thickness of dielectric layer is larger than height of metal structures; planarizing the surface of said dielectric layer; and forming a magnetic layer on dielectric layer. Moreover, some essential key-points of the method are dielectric layer is more sensitive to said stop layer than buffer layer and gap fill ability of dielectric layer is better than gap fill ability of buffer layer.

Abstract: A method for planarizing a polycrystalline silicon layer deposited on a trench, which is formed on a semiconductor substrate, comprises the following steps. First, a polycrystalline silicon layer with an enough thickness is deposited on the surface of the semiconductor substrate to overfill the trench. At least one dimple is undesirably developed on the polycrystalline silicon layer during the polycrystalline silicon deposition. Then, an oxide layer with an enough thickness is formed on the polycrystalline silicon layer to overfill the at least one dimple. Next, the polycrystalline silicon layer is partially oxidized so as to transform the upper portion thereof into a polysilicon oxide layer. As a result of a non-uniform distribution of the oxidization rate, the bottom surface of the polysilicon oxide layer, i.e. the interface between the polysilicon oxide layer and the non-oxidized portion of the polycrystalline silicon layer, is substantially planar.