Abstract: A display device including a display panel is disclosed. The display panel includes a substrate, multiple scan lines, multiple data lines, multiple pixel structures, a first gate driving circuit, and a second gate driving circuit. The pixel structures are electrically connected to the scan lines and the data lines. Multiple first output stage circuits of the first gate driving circuit disposed in a peripheral area are electrically connected to the scan lines. Multiple second output stage circuits of the second gate driving circuit disposed in the peripheral area are electrically connected to the scan lines. A channel width of a first output transistor of the first output stage circuit is greater than a channel width of a second output transistor of the second output stage circuit.

Abstract: A source driver includes a plurality of output terminals and a plurality of driving channels. Each of the plurality of driving channels is coupled to an output terminal among the plurality of output terminals and includes an output buffer, an output enable switch and a charge sharing circuit. The output enable switch is coupled between the output buffer and the corresponding output terminal. The charge sharing circuit is coupled to the corresponding output terminal. Wherein, the charge sharing circuits of at least two of the plurality of driving channels are commonly coupled to a charge sharing bus.

Abstract: An image sensor chip and a sensing method thereof are provided. The image sensor chip includes a pixel array. The pixel array includes a plurality of pixel units, and each of the pixel units includes a light sensing circuit, a reset switch and an output circuit. The reset switch is coupled to a first terminal of the light sensing circuit. The reset switch resets the light sensing circuit during reset period. The output circuit is coupled to the first terminal of the light sensing circuit. The output circuit of the pixel unit outputs difference information corresponding to the difference between the first sensing result of the light sensing circuit in a first frame period and the second sensing result of the light sensing circuit in a second frame period after the first frame period to a corresponding one of a plurality of readout lines of the pixel array.

Abstract: A source driver includes a plurality of output terminals and a plurality of driving channels. Each of the plurality of driving channels is coupled to an output terminal among the plurality of output terminals and includes an output buffer, an output enable switch and a charge sharing circuit. The output enable switch is coupled between the output buffer and the corresponding output terminal. The charge sharing circuit is coupled to the corresponding output terminal. Wherein, the charge sharing circuits of at least two of the plurality of driving channels are commonly coupled to a charge sharing bus.

Abstract: An image sensor chip and a sensing method thereof are provided. The image sensor chip includes a pixel array. The pixel array includes a plurality of pixel units, and each of the pixel units includes a light sensing circuit, a reset switch and an output circuit. The reset switch is coupled to a first terminal of the light sensing circuit. The reset switch resets the light sensing circuit during reset period. The output circuit is coupled to the first terminal of the light sensing circuit. The output circuit of the pixel unit outputs difference information corresponding to the difference between the first sensing result of the light sensing circuit in a first frame period and the second sensing result of the light sensing circuit in a second frame period after the first frame period to a corresponding one of a plurality of readout lines of the pixel array.

Abstract: Embodiments described herein provide systems for processing high efficiency SIGB (HE-SIGB) symbols and extracting resource unit (RU) information in down link orthogonal frequency division multiple access (DL-OFDMA) and multi-user multiple input multiple output (DL-MUMIMO) communication. An HE-SIGB symbol is processed based on an RU size mapping table. An RU counter is used to process entries in the RU size mapping table and determine the RU size and starting tone index of the intended RU. The RU parameters extracted from the HE-SIGB symbol are used to decode data symbols in the DL-OFDMA or DL-MUMIMO packet. Pilot tone indices of the intended User block and adjacent pilot tone indices are determined for improved carrier phase error estimation.

Abstract: A method of fabricating a semiconductor device is provided. In the method, a gate structure is formed on a semiconductor substrate. A photolithography process is performed with a mask having two transparent regions to form a photoresist layer having two openings in the semiconductor substrate. A first photoresist layer of the photoresist layer between the two openings is aligned to the gate structure and formed on the gate structure. The width of the first photoresist layer is shorter than the width of the gate structure such that a first side portion and a second side portion of the gate structure are exposed from both sides of the first photoresist layer, respectively. Next, an ion implantation process is performed to form lightly doped drain regions in the semiconductor substrate which are on two opposite sides of the gate structure of the photoresist layer.

Abstract: A method of fabricating a semiconductor device is provided. In the method, a gate structure is formed on a semiconductor substrate. A photolithography process is performed with a mask having two transparent regions to form a photoresist layer having two openings in the semiconductor substrate. A first photoresist layer of the photoresist layer between the two openings is aligned to the gate structure and formed on the gate structure. The width of the first photoresist layer is shorter than the width of the gate structure such that a first side portion and a second side portion of the gate structure are exposed from both sides of the first photoresist layer, respectively. Next, an ion implantation process is performed to form lightly doped drain regions in the semiconductor substrate which are on two opposite sides of the gate structure of the photoresist layer.