Patents by Inventor Yen-Liang Huang

Yen-Liang Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11942433
    Abstract: In an embodiment, a structure includes: a first integrated circuit die including first die connectors; a first dielectric layer on the first die connectors; first conductive vias extending through the first dielectric layer, the first conductive vias connected to a first subset of the first die connectors; a second integrated circuit die bonded to a second subset of the first die connectors with first reflowable connectors; a first encapsulant surrounding the second integrated circuit die and the first conductive vias, the first encapsulant and the first integrated circuit die being laterally coterminous; second conductive vias adjacent the first integrated circuit die; a second encapsulant surrounding the second conductive vias, the first encapsulant, and the first integrated circuit die; and a first redistribution structure including first redistribution lines, the first redistribution lines connected to the first conductive vias and the second conductive vias.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen-Hua Yu, Jen-Fu Liu, Ming Hung Tseng, Tsung-Hsien Chiang, Yen-Liang Lin, Tzu-Sung Huang
  • Publication number: 20240096609
    Abstract: The physical vapor deposition tool includes a magnet component, a single cathode, and a power circuit for biasing a pedestal that supports a semiconductor substrate. During a deposition operation that deposits an inert metal material, the physical vapor deposition tool may modulate an electromagnetic field emanating from the magnet component that includes spiral-shaped bands having different ranges of magnetic strength. The physical vapor deposition tool may have an increased throughput relative to a physical vapor deposition tool without the magnet component, the single cathode, and the power circuit. Additionally, or alternatively, the inert metal material may have a grain size that is greater relative to a grain size of an inert metal material deposited using the physical vapor deposition tool without the magnet component, the single cathode, and the power circuit.
    Type: Application
    Filed: January 31, 2023
    Publication date: March 21, 2024
    Inventors: Yen-Liang LIN, Yu-Kang HUANG, Yu-Chuan TAI
  • Patent number: 11935804
    Abstract: In an embodiment, a device includes: an integrated circuit die; an encapsulant at least partially surrounding the integrated circuit die, the encapsulant including fillers having an average diameter; a through via extending through the encapsulant, the through via having a lower portion of a constant width and an upper portion of a continuously decreasing width, a thickness of the upper portion being greater than the average diameter of the fillers; and a redistribution structure including: a dielectric layer on the through via, the encapsulant, and the integrated circuit die; and a metallization pattern having a via portion extending through the dielectric layer and a line portion extending along the dielectric layer, the metallization pattern being electrically coupled to the through via and the integrated circuit die.
    Type: Grant
    Filed: April 10, 2023
    Date of Patent: March 19, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tzu-Sung Huang, Ming Hung Tseng, Yen-Liang Lin, Hao-Yi Tsai, Chi-Ming Tsai, Chung-Shi Liu, Chih-Wei Lin, Ming-Che Ho
  • Publication number: 20240088195
    Abstract: An image sensor device includes a semiconductor substrate, a radiation sensing member, a shallow trench isolation, and a color filter layer. The radiation sensing member is in the semiconductor substrate. An interface between the radiation sensing member and the semiconductor substrate includes a direct band gap material. The shallow trench isolation is in the semiconductor substrate and surrounds the radiation sensing member. The color filter layer covers the radiation sensing member.
    Type: Application
    Filed: November 16, 2023
    Publication date: March 14, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chia-Yu WEI, Yen-Liang LIN, Kuo-Cheng LEE, Hsun-Ying HUANG, Hsin-Chi CHEN
  • Patent number: 11887928
    Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.
    Type: Grant
    Filed: December 17, 2021
    Date of Patent: January 30, 2024
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Yung-Shun Chang, Sheng-Wen Yang, Teck-Chong Lee, Yen-Liang Huang
  • Publication number: 20230197600
    Abstract: A package structure is provided. The package structure includes an encapsulant and an interposer. The encapsulant has a top surface and a bottom surface opposite to the top surface. The interposer is encapsulated by the encapsulant. The interposer includes a main body, an interconnector, and a stop layer. The main body has a first surface and a second surface opposite to the first surface. The interconnector is disposed on the first surface and exposed from the top surface of the encapsulant. The stop layer is on the second surface, wherein a bottom surface of the stop layer is lower than the second surface.
    Type: Application
    Filed: December 17, 2021
    Publication date: June 22, 2023
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Yung-Shun CHANG, Sheng-Wen YANG, Teck-Chong LEE, Yen-Liang HUANG
  • Patent number: 8952921
    Abstract: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of diode ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each diode ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: February 10, 2015
    Assignee: AU Optronics Corp.
    Inventors: Yen-Liang Huang, Wei-Hung Kuo, Chau-Shiang Huang, Tun-Chun Yang, Seok-Lyul Lee, Wei-Ming Huang
  • Patent number: 8514200
    Abstract: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of floating gate type ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each floating gate type ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: August 20, 2013
    Assignee: AU Optronics Corp.
    Inventors: Yen-Liang Huang, Wei-Hung Kuo, Tun-Chun Yang, Seok-Lyul Lee, Wei-Ming Huang
  • Publication number: 20110157084
    Abstract: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of diode ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each diode ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.
    Type: Application
    Filed: February 24, 2011
    Publication date: June 30, 2011
    Inventors: Yen-Liang Huang, Wei-Hung Kuo, Chau-Shiang Huang, Tun-Chun Yang, Seok-Lyul Lee, Wei-Ming Huang
  • Publication number: 20110157071
    Abstract: A capacitive touch display panel includes a display panel, a touch sensing unit, and a plurality of floating gate type ESD protection devices. The touch sensing unit includes a plurality of first sensing pads and second sensing pads. Each floating gate type ESD protection device is disposed between two adjacent first sensing pads and between two adjacent second sensing pads. The two adjacent first sensing pads are electrically disconnected from each other, and the two adjacent second sensing pads are electrically disconnected from each other.
    Type: Application
    Filed: April 26, 2010
    Publication date: June 30, 2011
    Inventors: Yen-Liang Huang, Wei-Hung Kuo, Tun-Chun Yang, Seok-Lyul Lee, Wei-Ming Huang