Patents by Inventor Yen Lin

Yen Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12294790
    Abstract: An imaging device may include an image sensor that generates frames of image data in response to incident light with an array of image pixels, and processing circuitry that processes the image data. The processing circuitry may include a transformation circuit that applies transforms to subsampled frames of image data that are generated using a subset of the image pixels to produce transform values, and a comparator circuit that compares the transform values. The processing circuitry may determine that motion has occurred between sequential frames if a difference between a first transform value corresponding to a first image frame and a second transform value corresponding to a second image frame exceeds a threshold value. In response to determining that motion has occurred, the image sensor may generate full-frame image data using all of the pixels of the array of image pixels.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: May 6, 2025
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Alexander Lu, Kuang-Yen Lin
  • Publication number: 20250140917
    Abstract: A solid-state electrolyte of a lithium-ion battery is provided. The lithium-ion battery has a negative electrode including a lithium-containing material in contact with the solid-state electrolyte. The solid-state electrolyte includes a multiple-doping material with a chemical formula of LixTiyMm(PO4)3, wherein 0.8?x?1.5, 0<y?0.6, M represents at least three different doping elements, 1.25?m?1.7, and y/m?0.5. The lithium-ion battery using the solid-state electrolyte is also provided.
    Type: Application
    Filed: October 25, 2024
    Publication date: May 1, 2025
    Inventors: I-Sheng Wang, Wen-Hsuan Lu, Yen-Lin Chen, Han-Yi Chen
  • Publication number: 20250118657
    Abstract: A method includes forming a first complementary Field-Effect Transistor (CFET) and a second CFET. The first CFET includes a first lower transistor, and a first upper transistor overlapping the first lower transistor. The second CFET includes a second lower transistor, and a second upper transistor overlapping the second lower transistor. The method further includes performing a first etching process to form a first opening, wherein the first etching process includes etching a first gate stack between the first upper transistor and the second upper transistor, and etching a second gate stack between the first lower transistor and the second lower transistor. The first opening is filled with a dielectric material to form a dielectric region. The method further includes performing a second etching process to etch a middle portion of the dielectric region and to form a second opening, and filling the second opening with a conductive material to form a through-via.
    Type: Application
    Filed: October 6, 2023
    Publication date: April 10, 2025
    Inventors: Wei-Xiang You, Jui-Chien Huang, Chun-Yen Lin, Szuya Liao
  • Publication number: 20250120237
    Abstract: An electronic device includes a sustaining layer, a substrate, a plurality of photoelectric units, and a plurality of signal layers. The substrate is arranged on a contact surface of the sustaining layer. A first end edge of the substrate approaches a first end edge of the sustaining layer, and a second end edge of the substrate approaches a second end edge of the sustaining layer. The sustaining layer and the substrate are arranged in one on one manner. The photoelectric units are arranged on a first surface or/and a second surface of the substrate. The signal layers are arranged on the substrate and electrically connected to the photoelectric units.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Chin-Tang LI, Ting-Yen LIN, Chen-Hsun YANG
  • Patent number: 12270408
    Abstract: A ceiling fan includes an outer shield, a middle ring, a blade bracket, and a fan blade. The middle ring is pivotally connected to the outer shield and rotates relative to the outer shield. The blade bracket protrudes from the middle ring and has two guiding surfaces located on opposite sides of the blade bracket. The fan blade is combined with the middle ring by the blade bracket. The fan blade has an opening on an end close to the blade bracket. The fan blade further includes a housing, one or more supporting ribs, and two guiding limiting parts.
    Type: Grant
    Filed: September 23, 2023
    Date of Patent: April 8, 2025
    Assignee: DELTA ELECTRONICS, INC.
    Inventors: Sheng-Hsiang Huang, Chan-Yuan Tsao, Lung-Sheng Pan, Yen-Lin Chen
  • Patent number: 12266602
    Abstract: A method includes forming an interlayer dielectric (ILD) layer over a transistor; forming a first inter-metal dielectric (IMD) layer over the ILD layer; etching a via opening extending through the first IMD layer; forming a first 2-D material layer lining along sides and a bottom of the via opening; depositing a first metal in the via opening and over the first 2-D material layer; performing a chemical mechanism polishing (CMP) process to the first metal until the first IMD layer is exposed; forming a second IMD layer over the first IMD layer; etching a trench in the second IMD layer; forming a second 2-D material layer lining along sides and a bottom of the trench; and depositing a second metal over the second 2-D material layer at a temperature lower than a temperature of depositing the first metal over the first 2-D material layer.
    Type: Grant
    Filed: January 10, 2022
    Date of Patent: April 1, 2025
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen Lin, Yu-Wei Zhang, Kuan-Chao Chen, Si-Chen Lee, Chi Chen
  • Patent number: 12265412
    Abstract: A circuit includes a voltage divider circuit configured to generate a feedback voltage according to an output voltage, an operational amplifier configured to output a driving signal according to the feedback voltage and a reference voltage and a pass gate circuit including multiple current paths. The current paths are controlled by the driving signal and connected in parallel between the voltage divider circuit and a power reference node.
    Type: Grant
    Filed: April 11, 2024
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Huan-Neng Chen, Yen-Lin Liu, Chia-Wei Hsu, Jo-Yu Wu, Chang-Fen Hu, Shao-Yu Li, Bo-Ting Chen
  • Publication number: 20250107031
    Abstract: The present disclosure provides an adapter bracket, which includes a first portion, a second portion and a third portion. The first portion includes a protruding portion extending from a first bottom surface of the first portion in a direction perpendicular to the first bottom surface. The second portion, has an elevation with respect to the first bottom surface of the first portion. The second portion comprising a first hole. The third portion extends between the first portion and the second portion.
    Type: Application
    Filed: September 22, 2023
    Publication date: March 27, 2025
    Inventors: YAW-TZORNG TSORNG, TUNG-HSIEN WU, YU-YING TSENG, YEN-LIN LIU
  • Patent number: 12256646
    Abstract: A memory device includes a substrate, a spin-orbit torque (SOT) layer, a magnetic tunneling junction (MTJ) film stack, a connecting via and a shielding structure. The SOT layer is disposed on the substrate. The MTJ film stack is formed over SOT layer and on the substrate. The connecting via is disposed on and electrically connected to the MTJ film stack. The shielding structure is laterally surrounding the MTJ film stack and disposed on the SOT layer, wherein the shielding structure includes a first dielectric layer, a high magnetic permeability layer and a second dielectric layer, the first dielectric layer is in contact with the SOT layer and the MTJ film stack, and the high magnetic permeability layer is sandwiched between the first dielectric layer and the second dielectric layer.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: March 18, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yen-Lin Huang, Ming-Yuan Song, Chien-Min Lee, Nuo Xu, Shy-Jay Lin
  • Patent number: 12255392
    Abstract: A wideband antenna system includes a first metal radiation portion, having a coupling distance with a second metal radiation portion; a first feeding contact and a second feeding contact, electrically connected to the first metal radiation portion and the second metal radiation portion respectively, and close to the coupling distance; a first ground contact, electrically connected to the second metal radiation portion; a second ground contact, electrically connected to the first metal radiation portion; an impedance tuner, electrically connected to the first feeding contact, the second feeding contact, the first ground contact, the second ground contact, and a radio frequency signal source, to switch the first metal radiation portion and the second metal radiation portion; an aperture contact, electrically connected to the first metal radiation portion; and an aperture tuner, electrically connected to the aperture contact.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: March 18, 2025
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Chun-Chieh Su, Wei-Cheng Lo, Chien-Ming Hsu, Che-Yen Lin, Chuan-Chien Huang
  • Patent number: 12245664
    Abstract: An article of footwear, the article including a sole structure and an upper coupled to a top of the sole structure. The upper including an opening and a closure system, wherein the closure system includes at least one first sheet and a plurality of second sheets. The at least one first sheet and the plurality of second sheets being interleaved.
    Type: Grant
    Filed: March 14, 2023
    Date of Patent: March 11, 2025
    Assignee: NIKE, Inc.
    Inventor: Yen Lin Lee
  • Publication number: 20250081499
    Abstract: A method includes forming a gate electrode in contact with a gate dielectric layer; forming a first 2-D material buffer layer over the gate dielectric layer; forming a 2-D material channel layer over the first 2-D material buffer layer; and forming source/drain electrodes over source/drain regions of the 2-D material channel layer.
    Type: Application
    Filed: August 31, 2023
    Publication date: March 6, 2025
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TAIWAN UNIVERSITY
    Inventors: Shih-Yen LIN, Che-Jia CHANG
  • Publication number: 20250074984
    Abstract: Embodiments provided herein, provide for variant IgG Fc polypeptides, dimeric molecules, pharmaceutical compositions, and methods that can be used to target at cells to modulate the activity of the same to treat disorders, such as autoimmune disorders or cancers.
    Type: Application
    Filed: March 22, 2024
    Publication date: March 6, 2025
    Inventors: Yen-Lin Chen, Ryan Peckner, Nathan Higginson-Scott, Daniela Cipolletta, Yanfeng Zhou, Kevin Lewis Otipoby, Jyothsna Visweswaraiah
  • Patent number: 12242321
    Abstract: The disclosure provides a power management method. The power management method is applicable to an electronic device. The electronic device is electrically coupled to an adapter, and includes a system and a battery. The adapter has a feed power. The battery has a discharge power. The power management method of the disclosure includes: reading a power value of the battery; determining a state of the system; and discharging power to the system, when the system is in a power-on state and the power value is greater than a charging stopping value, by using the battery, and controlling, according to the discharge power and the feed power, the adapter to selectively supply power to the system. The disclosure further provides an electronic device using the power management method.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: March 4, 2025
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Wen Che Chung, Hui Chuan Lo, Hao-Hsuan Lin, Chun Tsao, Jun-Fu Chen, Ming-Hung Yao, Jia-Wei Zhang, Kuan-Lun Chen, Ting-Chao Lin, Cheng-Yen Lin, Chunyen Lai
  • Publication number: 20250062201
    Abstract: A package includes a first integrated circuit die and a second integrated circuit die over and bonded to the first integrated circuit die. A first surface region of the second integrated circuit die is hydrophobic, and the first integrated circuit die and the second integrated circuit die are bonded together with dielectric-to-dielectric bonds and metal-to-metal bonds. The package further includes a first insulating material over the first integrated circuit and surrounding the second integrated circuit die. The first insulating material contacts the first surface region.
    Type: Application
    Filed: November 3, 2023
    Publication date: February 20, 2025
    Inventors: Chen-Shien Chen, Chi-Yen Lin, Po-Chen Chen, Wu-An Weng, Hsu-Hsien Chen
  • Publication number: 20250059383
    Abstract: An antimicrobial article includes a supporting layer and an antimicrobial layer. The antimicrobial layer has a first major surface at least partially formed by a plurality of particles and a second major surface coupled to the supporting layer. Each particle of the plurality of particles is formed by a bead of nonconductive material. A first set of the particles include beads coated by a first conductive material.
    Type: Application
    Filed: December 2, 2022
    Publication date: February 20, 2025
    Inventors: Lijun Zu, Minghua Dai, Stephen A. O. Olson, Ying Xia, Qihong Nie, Yen-Lin Wu
  • Publication number: 20250053821
    Abstract: An auto-regressive method for a large language model includes receiving a hidden state associated with at least one token, generating key data, first value data, and query data according to a received hidden state, generating first positionally encoded key data by encoding the key data positionally, generating positionally encoded query data by encoding the query data positionally, performing first element-wise dot product operations according to the first positionally encoded key data, the positionally encoded query data, and second positionally encoded key data to generate an attention score, performing second element-wise dot product operations according to the first value data, the attention score, and second value data to generate an attention output, and adding the attention output and the hidden state to generate an updated hidden output.
    Type: Application
    Filed: July 11, 2024
    Publication date: February 13, 2025
    Applicant: MediaTek Singapore Pte. Ltd.
    Inventors: Jia Yao Christopher LIM, Kelvin Kae Wen TEH, Po-Yen LIN, Jung Hau FOO, Chia-Wei HSU, Yu-Lung LU, Hung-Jen CHEN, Chung-Li LU, Wai Mun WONG
  • Publication number: 20250054712
    Abstract: Dome switches can provide inconsistent positive tactile feedback, particularly when depressed around the edges of a corresponding push button as compared to depression at the middle of the push button. Various arrangements intended to render push buttons that incorporate one or more dome switches more consistent in providing positive tactile feedback, while maintaining a reasonable ease and cost of manufacturing, are discussed herein. A push button with consistent edge performance using a single dome switch incorporates a hinge arm that spans button posts. This reduces or eliminates rotation deflection of a button cap caused by the torsional forces on the push button created by depression forces applied by the user at an edge of the push button. As a result, the dome switch provides a predictable and consistent positive tactile feedback to the user similar to that achieved by a centrally applied depression force.
    Type: Application
    Filed: December 24, 2021
    Publication date: February 13, 2025
    Inventors: Yi-Yen LIN, Jun YE, Jian ZUO
  • Patent number: D1065199
    Type: Grant
    Filed: January 19, 2023
    Date of Patent: March 4, 2025
    Assignee: JYH ENG TECHNOLOGY CO., LTD.
    Inventor: Yen-Lin Lin
  • Patent number: D1068055
    Type: Grant
    Filed: September 7, 2021
    Date of Patent: March 25, 2025
    Assignee: Delta Electronics, Inc.
    Inventors: Ko-Neng Huang, Yu-Hsiang Huang, Yen-Lin Chen