Patents by Inventor Yen-Mei Tsai Huang

Yen-Mei Tsai Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11239179
    Abstract: A semiconductor package includes a substrate having thereon a high-frequency chip and a circuit component susceptible to high-frequency signal interference; a ground pad on the and between the high-frequency chip and the circuit component; a metal-post reinforced glue wall on the ground pad; a molding compound surrounding the metal-post reinforced glue wall and surrounding the high-frequency chip and the circuit component; and a conductive layer disposed on the molding compound and in contact with the metal-post reinforced glue wall. The metal-post reinforced glue wall comprises first metal posts and glue attached to the first metal posts. An interface between a base of each of the first metal posts and the ground pad has a root mean square (RMS) roughness that is less than 1.0 micrometer.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: February 1, 2022
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Patent number: 11211340
    Abstract: A semiconductor package includes a substrate having a semiconductor chip disposed on a top surface of the substrate, a ground ring surrounding the semiconductor chip on the top surface of the substrate, a metal-post reinforced glue wall disposed on the ground ring to surround the semiconductor chip, and a molding compound disposed only inside the metal-post reinforced glue wall and covering the semiconductor chip. The metal-post reinforced glue wall comprises a magnetic or magnetizable filler so as to form an active electro-magnetic compatibility (EMC) shielding.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: December 28, 2021
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Patent number: 10923435
    Abstract: A semiconductor package includes a substrate having at least one semiconductor chip on a top surface of the substrate; a ground ring, on the top surface of the substrate, surrounding the at least one semiconductor chip; a metal-post reinforced glue wall disposed on the ground ring, surrounding the at least one semiconductor chip; a molding compound surrounding the at least one semiconductor chip, wherein a rear surface of the at least one semiconductor chip is flush with an upper surface of the molding compound; a conductive layer disposed on the molding compound and in direct contact with the rear surface of the semiconductor chip and the metal-post reinforced glue wall; a solder layer disposed on the conductive layer; and a heat sink disposed on the solder layer.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: February 16, 2021
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Patent number: 10896880
    Abstract: A semiconductor package includes a substrate. A high-frequency chip and a circuit component susceptible to high-frequency interference are disposed on a top surface of the substrate. A first ground ring is disposed on the substrate around the high-frequency chip. A first metal-post reinforced glue wall is disposed on the first ground ring to surround the high-frequency chip. A second ground ring is disposed on the top of the substrate around the circuit component. A second metal-post reinforced glue wall is disposed on the second ground ring to surround the circuit component. Mold-flow channels are disposed in the first and second metal-post reinforced glue walls. A molding compound covers at least the high-frequency chip and the circuit component. A conductive layer is disposed on the molding compound and is coupled to the first metal-post reinforced glue wall and/or the second metal-post reinforced glue wall.
    Type: Grant
    Filed: December 17, 2019
    Date of Patent: January 19, 2021
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Publication number: 20200343196
    Abstract: A semiconductor package includes a substrate having thereon a high-frequency chip and a circuit component susceptible to high-frequency signal interference; a ground pad on the and between the high-frequency chip and the circuit component; a metal-post reinforced glue wall on the ground pad; a molding compound surrounding the metal-post reinforced glue wall and surrounding the high-frequency chip and the circuit component; and a conductive layer disposed on the molding compound and in contact with the metal-post reinforced glue wall. The metal-post reinforced glue wall comprises first metal posts and glue attached to the first metal posts. An interface between a base of each of the first metal posts and the ground pad has a root mean square (RMS) roughness that is less than 1.0 micrometer.
    Type: Application
    Filed: July 13, 2020
    Publication date: October 29, 2020
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Publication number: 20200194382
    Abstract: A semiconductor package includes a substrate having at least one semiconductor chip on a top surface of the substrate; a ground ring, on the top surface of the substrate, surrounding the at least one semiconductor chip; a metal-post reinforced glue wall disposed on the ground ring, surrounding the at least one semiconductor chip; a molding compound surrounding the at least one semiconductor chip, wherein a rear surface of the at least one semiconductor chip is flush with an upper surface of the molding compound; a conductive layer disposed on the molding compound and in direct contact with the rear surface of the semiconductor chip and the metal-post reinforced glue wall; a solder layer disposed on the conductive layer; and a heat sink disposed on the solder layer.
    Type: Application
    Filed: February 24, 2020
    Publication date: June 18, 2020
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Publication number: 20200168560
    Abstract: A semiconductor package includes a substrate. A high-frequency chip and a circuit component susceptible to high-frequency interference are disposed on a top surface of the substrate. A first ground ring is disposed on the substrate around the high-frequency chip. A first metal-post reinforced glue wall is disposed on the first ground ring to surround the high-frequency chip. A second ground ring is disposed on the top of the substrate around the circuit component. A second metal-post reinforced glue wall is disposed on the second ground ring to surround the circuit component. Mold-flow channels are disposed in the first and second metal-post reinforced glue walls. A molding compound covers at least the high-frequency chip and the circuit component. A conductive layer is disposed on the molding compound and is coupled to the first metal-post reinforced glue wall and/or the second metal-post reinforced glue wall.
    Type: Application
    Filed: December 17, 2019
    Publication date: May 28, 2020
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang
  • Publication number: 20200168561
    Abstract: A semiconductor package includes a substrate having a semiconductor chip disposed on a top surface of the substrate, a ground ring surrounding the semiconductor chip on the top surface of the substrate, a metal-post reinforced glue wall disposed on the ground ring to surround the semiconductor chip, and a molding compound disposed only inside the metal-post reinforced glue wall and covering the semiconductor chip. The metal-post reinforced glue wall comprises a magnetic or magnetizable filler so as to form an active electro-magnetic compatibility (EMC) shielding.
    Type: Application
    Filed: December 17, 2019
    Publication date: May 28, 2020
    Inventors: Shiann-Tsong Tsai, Hsien-Chou Tsai, Hsien-Wei Tsai, Yen-Mei Tsai Huang