Abstract: A gate driving circuit and a driving method thereof are provided. The gate driving circuit includes a control signal generator and at least one gate channel set, each of the at least one gate channel set includes a plurality of gate channels, and the plurality of gate channels share a level shifter. The driving method includes generating a plurality of first control signals and a plurality of second control signals according to a gate driver start pulse, and determining that one of the gate channels uses the level shifter during a time period according to the plurality of first control signals and the plurality of second control signals. Therefore, the number of the level shifters can be decreased.

Abstract: A locking device includes a lock and a key. The lock includes a housing, a cylindrical core inserted into and rotatable relative to the housing, and a limiting member that is mounted movably between the housing and the cylindrical core to permit or prevent the relative rotation between the housing and the cylindrical core and that extends into a helical keyway formed in the cylindrical core. The key has a helical blade capable of being inserted into the helical keyway to access the limiting member, so as to move the limiting member to permit the relative rotation between the cylindrical core and the housing.

Abstract: A locking device includes a lock and a key. The lock includes a housing, a cylindrical core inserted into and rotatable relative to the housing, and a tumbler unit that is mounted between the housing and the cylindrical core to permit or prevent the relative rotation between the housing and the cylindrical core and that has a first pin extending into a helical keyway formed in the cylindrical core. The key has a helical blade capable of being inserted into the helical keyway to access the first pin, so as to switch the tumbler unit to permit the relative rotation between the cylindrical core and the housing.

Abstract: A locking device includes a lock and a key. The lock includes a housing, a cylindrical core inserted into and rotatable relative to the housing, and a limiting member that is mounted movably between the housing and the cylindrical core to permit or prevent the relative rotation between the housing and the cylindrical core and that extends into a helical keyway formed in the cylindrical core. The key has a helical blade capable of being inserted into the helical keyway to access the limiting member, so as to move the limiting member to permit the relative rotation between the cylindrical core and the housing.

Abstract: A gate driving circuit and a driving method thereof are provided. The gate driving circuit includes a control signal generator and at least one gate channel set, each of the at least one gate channel set includes a plurality of gate channels, and the plurality of gate channels share a level shifter. The driving method includes generating a plurality of first control signals and a plurality of second control signals according to a gate driver start pulse, and determining that one of the gate channels uses the level shifter during a time period according to the plurality of first control signals and the plurality of second control signals. Therefore, the number of the level shifters can be decreased.

Abstract: An electrostatic discharge clamp circuit is provided for low power applications. The clamp circuit includes: a detection circuit, a bias circuit and a shunting circuit having at least one shunt transistor. The detection circuit is configured to detect an occurrence of an electrostatic charge on a power supply node and trigger discharge of the electrostatic charge through the shunting circuit. The bias circuit is coupled between the detection circuit and the shunting circuit and applies a bias voltage to the gate terminal of the shunt transistor. During an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially equal to the supply voltage; whereas, during the absence of an electrostatic discharge event, the bias circuit is configured to generate a bias voltage that is substantially half of the supply voltage.

Abstract: A method for changing a globular protein structure into a fibrillar protein structure. The method comprising the steps of providing a globular protein, forming a solution containing the globular protein, adding a detergent to the solution containing the globular protein, applying the solution to a molecular sizing column with a pore size of at least 70 kDa and eluting with a solution containing detergent. A method for changing an unfolded protein structure into a fibrillar protein structure. The method comprising the steps of providing a globular protein, forming a solution containing the globular protein, adding a urea to the solution to unfold the globular protein, applying the solution to a molecular sizing column and eluting with a solution containing detergent. A method for treating cancer comprising the steps of providing a protein, changing the protein into a fibrillar structure, and administering a therapeutically effective amount of the fibrillar structure protein to a patient in need thereof.

Abstract: The present disclosure relates to the discovery of methods of isolating subfractions of an F3 Reishi extract, and of administration of these novel isolates to eukaryotic cells in order to induce certain immumodulatory, hematopoeitic and tumor-inhibiting phenotypic changes in those eukaryotic cells, mediated through particular toll-like receptor (TLR) and other transmembrane receptors. F3 subfractions F301 and F331 have demonstrated that F331 is capable of activating at least TLR-2 while F301 is capable of activating at least TLR-2, TLR-4, and TLR-5.

Abstract: A heating device includes a first induction coil, a second induction coil, a first phase power unit, a second phase power unit, a power controller and a user interface unit. The second induction coil isn't always concentric with the first induction coil. The first phase power unit is connected with the first induction coil, and configured for receiving a first phase input voltage and outputting a first voltage. The second phase power unit is connected with the second induction coil, and configured for receiving a second phase input voltage and outputting a second voltage. There is a phase difference between the first phase input voltage and the second phase input voltage. The power controller is used for controlling operations of the first phase power unit and the second phase power unit. The user interface unit is connected with the power controller for controlling the power controller.

Abstract: A gate driving circuit for an LCD device includes a shift register module for generating a plurality of scan signals corresponding to a plurality of channels according to a start signal and a clock signal, a plurality of logic circuits each corresponding to a channel of the plurality of channels, for outputting a driving signal to the channel according to a scan signal of the plurality of scan signals and a shutdown indication signal, and a plurality of shaping and delay units each coupled between two neighboring channels for outputting the shutdown indication signal to another channel after shaping and delaying the shutdown indication signal of a previous stage.

Abstract: A shift register apparatus is provided. Each of shift registers within the shift register apparatus of the present invention is only constituted by a few of active and passive elements without using conventional digital logic elements, and even the passive element are not required at some conditions. Therefore, the layout area occupied/consumed by each of the shift registers of the present invention is relatively smaller than that of the conventional shift register constituted by a CMOS D-flip-flop, and thus a fabrication cost can be reduced.

Abstract: A shift register apparatus is provided. Each of shift registers within the shift register apparatus of the present invention is only constituted by a few of active and passive elements without using conventional digital logic elements, and even the passive element are not required at some conditions. Therefore, the layout area occupied/consumed by each of the shift registers of the present invention is relatively smaller than that of the conventional shift register constituted by a CMOS D-flip-flop, and thus a fabrication cost can be reduced.

Abstract: A gate driving circuit includes a first output buffer unit region, a level shifter region and a low voltage circuit region. The first output buffer unit region is formed on a plane and is utilized for setting a first output buffer unit. The level shifter region is formed on the plane for setting a level shifter, and includes a vertical region and a horizontal region connected to the vertical region. The vertical region and the first output buffer unit region are aligned in a horizontal direction of the plane. The horizontal region is beneath the vertical region and the first output buffer unit region. The low voltage circuit region is formed on the plane for setting a low voltage circuit, and is beneath the horizontal region. The low voltage circuit region and the horizontal region are aligned in a vertical direction of the plane.

Abstract: A gate driving circuit includes a first output buffer unit region, a level shifter region and a low voltage circuit region. The first output buffer unit region is formed on a plane and is utilized for setting a first output buffer unit. The level shifter region is formed on the plane for setting a level shifter, and includes a vertical region and a horizontal region connected to the vertical region. The vertical region and the first output buffer unit region are aligned in a horizontal direction of the plane. The horizontal region is beneath the vertical region and the first output buffer unit region. The low voltage circuit region is formed on the plane for setting a low voltage circuit, and is beneath the horizontal region. The low voltage circuit region and the horizontal region are aligned in a vertical direction of the plane.

Abstract: The present disclosure relates to the discovery of methods of isolating subfractions of an F3 Reishi extract, and of administration of these novel isolates to eukaryotic cells in order to induce certain immumodulatory, hematopoeitic and tumor-inhibiting phenotypic changes in those eukaryotic cells, mediated through particular toll-like receptor (TLR) and other transmembrane receptors. F3 subfractions F301 and F331 have demonstrated that F331 is capable of activating at least TLR-2 while F301 is capable of activating at least TLR-2, TLR-4, and TLR-5.

Abstract: A method for changing a globular protein structure into a fibrillar protein structure. The method comprising the steps of providing a globular protein, forming a solution containing the globular protein, adding a detergent to the solution containing the globular protein, applying the solution to a molecular sizing column with a pore size of at least 70 kDa and eluting with a solution containing detergent. A method for changing an unfolded protein structure into a fibrillar protein structure. The method comprising the steps of providing a globular protein, forming a solution containing the globular protein, adding a urea to the solution to unfold the globular protein, applying the solution to a molecular sizing column and eluting with a solution containing detergent. A method for treating cancer comprising the steps of providing a protein, changing the protein into a fibrillar structure, and administering a therapeutically effective amount of the fibrillar structure protein to a patient in need thereof.