Patents by Inventor Yen-Sung CHEN

Yen-Sung CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10448043
    Abstract: A motion estimation method and a motion estimator are provided. The motion estimation method includes the following steps of for each respective block of the current frame, selecting a candidate set associated with the current frame and a previous frame, and determining a motion vector according to the candidate set for the each respective block of the current frame. The candidate set includes at least one spatial candidate block in the current frame and temporal candidate blocks in the previous frame. The step of selecting the candidate set includes: selecting the spatial candidate block directly adjacent to the each respective block from the current frame and selecting the plurality of temporal candidate blocks directly adjacent to a reference block from the previous frame.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: October 15, 2019
    Assignee: NOVATEK Microelectronics Corp.
    Inventors: Pengyuan Hu, Xi Tian, Yen-Sung Chen, Yuanjia Du
  • Publication number: 20180184106
    Abstract: A motion estimation method is provided which includes for each respective block of the current frame, selecting a candidate set associated with the current frame and a previous frame, the candidate set comprising at least one spatial candidate block in the current frame and a plurality of temporal candidate blocks in the previous frame, wherein the step of selecting the candidate set comprises: selecting the at least one spatial candidate block directly adjacent to the each respective block from the current frame; and selecting the plurality of temporal candidate blocks directly adjacent to a reference block from the previous frame; and determining a motion vector according to the candidate set for the each respective block of the current frame.
    Type: Application
    Filed: December 28, 2016
    Publication date: June 28, 2018
    Inventors: PENGYUAN HU, XI TIAN, Yen-Sung Chen, Yuanjia DU
  • Publication number: 20180184107
    Abstract: The invention provides an apparatus and a method for motion estimation. The motion estimation apparatus includes a candidate set generation circuit and a motion vector (MV) determination circuit. The candidate set generation circuit selects to add motion vectors of adjacent blocks into a motion vector candidate set of a current block of a current frame. The current block and one of the adjacent blocks belong to the same row (or the same column), and the one of the adjacent blocks is a block of the current frame or a block of a previous frame. The motion vector determination circuit is coupled to the candidate set generation circuit to receive the motion vector candidate set. The motion vector determination circuit determines the motion vector of the current block of the current frame according to the motion vector candidate set.
    Type: Application
    Filed: August 11, 2017
    Publication date: June 28, 2018
    Applicant: Novatek Microelectronics Corp.
    Inventors: Pengyuan Hu, Xi Tian, Yen-Sung Chen, Yuan-Jia Du
  • Patent number: 9894367
    Abstract: A motion estimation method is provided for generating a motion vector of a to-be-generated frame between two continuous reference frames. The method includes the following steps. A candidate motion vector is obtained according to the position of a to-be-generated block of a to-be-generated frame. Two first reference blocks are obtained from the two reference frames by extending the candidate motion vector from the to-be-generated block to the two reference frames, respectively. Two second reference blocks are obtained from the two reference frames by extending the candidate motion vector from one reference frame to another reference frame. Whether the candidate motion vector is valid is determined according to the positions of the two reference blocks obtained in each obtaining step. The corresponding motion vector of the to-be-generated block is determined according to the valid candidate motion vector.
    Type: Grant
    Filed: February 22, 2012
    Date of Patent: February 13, 2018
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yen-Sung Chen, Yu-Shu Liu, Tsui-Chin Chen, Chun Wang, Jian-De Jiang
  • Patent number: 9525873
    Abstract: An image processing circuit and an image processing method are provided. The image processing circuit comprises a full search engine and a frame rate conversion (FRC) engine. The full search engine executes a full search to generate a sum of sum of absolute difference (SAD) distribution according to the reference image and the current image. The FRC engine analyzes a scene characteristic from the current image according to SAD distribution. The FRC engine adjusts at least one of the control parameters according to the scene characteristic. The FRC engine generates an interpolated image according to the reference image, the current image and the control parameters.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: December 20, 2016
    Assignee: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yen-Sung Chen, Tsui-Chin Chen, Jian-De Jiang
  • Patent number: 8938125
    Abstract: A motion estimation method is provided, which includes following steps: dividing a first frame to be estimated into a plurality of area units, in which each of the area units includes a plurality of blocks; and assigning a set of motion vector values to each of the area units, in which the set of motion vector values includes a plurality of predetermined motion vector values, and each of the predetermined motion vector values is assigned to at least one block in each of the area units.
    Type: Grant
    Filed: June 8, 2012
    Date of Patent: January 20, 2015
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yen-Sung Chen, Tsui-Chin Chen, Jiande Jiang, Yu-Tsung Hu
  • Patent number: 8923643
    Abstract: An image processing circuit and an image processing method are disclosed. The image processing circuit comprises a block matching unit, a multiplexer, an arbiter, and a motion compensation circuit. The block matching unit calculates an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image. The arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image. The motion compensation circuit executes motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 30, 2014
    Assignee: Novatek Microelectronics Corp.
    Inventors: Yen-Sung Chen, Tsui-Chin Chen, Yu-Tsung Hu, Xing-Rui Wang
  • Publication number: 20130279590
    Abstract: An image processing circuit and an image processing method are provided. The image processing circuit comprises a full search engine and a frame rate conversion (FRC) engine. The full search engine executes a full search to generate a sum of sum of absolute difference (SAD) distribution according to the reference image and the current image. The FRC engine analyzes a scene characteristic from the current image according to SAD distribution. The FRC engine adjusts at least one of the control parameters according to the scene characteristic. The FRC engine generates an interpolated image according to the reference image, the current image and the control parameters.
    Type: Application
    Filed: April 19, 2013
    Publication date: October 24, 2013
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yen-Sung CHEN, Tsui-Chin Chen, Jian-De Jiang
  • Publication number: 20130034310
    Abstract: An image processing circuit and an image processing method are disclosed. The image processing circuit comprises a block matching unit, a multiplexer, an arbiter, and a motion compensation circuit. The block matching unit calculates an alternating current (AC) sum of absolute difference (SAD) and a direct current (DC) sum of absolute difference (SAD) according to a current block in a current image and a reference block in a reference image. The arbiter controls the multiplexer selectively to output the AC SAD or the DC SAD according to an arbitration rule related to a scene characteristic of the current image. The motion compensation circuit executes motion compensation according to the AC SAD or the DC SAD outputted by the multiplexer.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 7, 2013
    Applicant: NOVATEK MICROELECTRONICS CORP.
    Inventors: Yen-Sung Chen, Tsui-Chin Chen, Yu-Tsung Hu, Xing-Rui Wang
  • Publication number: 20130022276
    Abstract: A motion estimation method is provided, which includes following steps: dividing a first frame to be estimated into a plurality of area units, in which each of the area units includes a plurality of blocks; and assigning a set of motion vector values to each of the area units, in which the set of motion vector values includes a plurality of predetermined motion vector values, and each of the predetermined motion vector values is assigned to at least one block in each of the area units.
    Type: Application
    Filed: June 8, 2012
    Publication date: January 24, 2013
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yen-Sung Chen, Tsui-Chin Chen, Jiande Jiang, Yu-Tsung Hu
  • Publication number: 20120213284
    Abstract: A motion estimation method is provided for generating a motion vector of a to-be-generated frame between two continuous reference frames. The method includes the following steps. A candidate motion vector is obtained according to the position of a to-be-generated block of a to-be-generated frame. Two first reference blocks are obtained from the two reference frames by extending the candidate motion vector from the to-be-generated block to the two reference frames, respectively. Two second reference blocks are obtained from the two reference frames by extending the candidate motion vector from one reference frame to another reference frame. Whether the candidate motion vector is valid is determined according to the positions of the two reference blocks obtained in each obtaining step. The corresponding motion vector of the to-be-generated block is determined according to the valid candidate motion vector.
    Type: Application
    Filed: February 22, 2012
    Publication date: August 23, 2012
    Applicant: Novatek Microelectronics Corp.
    Inventors: Yen-Sung CHEN, Yu-Shu Liu, Tsui-Chin Chen, Chun Wang, Jian-De Jiang