Patents by Inventor Yen-Ti Chia

Yen-Ti Chia has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130029500
    Abstract: The present invention provides a connector including a substrate, at least a conductive via disposed inside the substrate, a pad disposed on one surface of the substrate and electrically connected to the conductive via, a resilient flange disposed on the pad, and an anisotropic conductive adhesive interposed between the pad and the resilient flange to electrically connect the pad with the resilient flange.
    Type: Application
    Filed: April 19, 2012
    Publication date: January 31, 2013
    Inventors: Chih-Peng Fan, Ling-Kai Su, Yen-Ti Chia
  • Patent number: 8186049
    Abstract: A manufacturing method of a circuit structure is provided as follows. Firstly, a base conductive layer is formed on the carrier board and a first patterned plating-resistant layer having at least one trench for exposing a part of the base conductive layer is formed on the base conductive layer. A first patterned conductive layer is then formed in the trench and a second patterned plating-resistant layer is formed which covers a part of the first patterned conductive layer and a part of the first patterned plating-resistant layer. A second patterned conductive layer is formed on the exposed first patterned conductive layer. The first and the second patterned plating-resistant layers and the base conductive layer exposed by the first patterned conductive layer are removed. Then, a patterned solder mask is formed for covering a part of the first patterned conductive layer.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: May 29, 2012
    Assignee: Unimicron Technology Corp.
    Inventors: Chih-Peng Fan, Yen-Ti Chia
  • Publication number: 20120073867
    Abstract: A circuit structure suitable for being disposed on a carrier board. The circuit structure comprises a first patterned conductive layer, a second patterned conductive layer, and a solder mask. The first patterned conductive layer is disposed on the carrier board. The second patterned conductive layer is disposed on a part of the first patterned conductive layer. A part of the edge of the second patterned conductive layer and a part of the edge of the first patterned conductive layer are substantially coplanar. The patterned solder mask covers a part of the first patterned conductive layer and has at least one opening for exposing the second patterned conductive layer and a part of the first patterned conductive layer adjacent to the second patterned conductive layer.
    Type: Application
    Filed: December 7, 2011
    Publication date: March 29, 2012
    Applicant: Unimicron Technology Corp.
    Inventors: Chih-Peng Fan, Yen-Ti Chia
  • Publication number: 20090288858
    Abstract: A manufacturing method of a circuit structure is provided as follows. Firstly, a base conductive layer is formed on the carrier board and a first patterned plating-resistant layer having at least one trench for exposing a part of the base conductive layer is formed on the base conductive layer. A first patterned conductive layer is then formed in the trench and a second patterned plating-resistant layer is formed which covers a part of the first patterned conductive layer and a part of the first patterned plating-resistant layer. A second patterned conductive layer is formed on the exposed first patterned conductive layer. The first and the second patterned plating-resistant layers and the base conductive layer exposed by the first patterned conductive layer are removed. Then, a patterned solder mask is formed for covering a part of the first patterned conductive layer.
    Type: Application
    Filed: July 29, 2008
    Publication date: November 26, 2009
    Applicant: UNIMICRON TECHNOLOGY CORP.
    Inventors: Chih-Peng Fan, Yen-Ti Chia