Patents by Inventor Yen-Tun Peng

Yen-Tun Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8312070
    Abstract: Disclosed is directed to a speed-level calculator and calculating method for dynamic voltage scaling. The speed-level calculator comprises a deadline counter, a shifter, and a fixed-point multiplier. The deadline counter calculates the residual time D from current time to each task deadline for completing an episode. The shifter generates a D? value by shifting the D value to the right for e-m bits, and takes the decimal fraction part of the D? value for m bits. The speed-level calculator further comprises a saturation control circuit to detect if an overflow occurs on the D? value. According to a pre-calculated parameter ?i corresponding to each task Ti, the fixed-point multiplier performs the multiplication of D? and ?i. After completing saturation and rounding on the multiplication result, a corresponding clock period is generated by taking the integer part. This clock period is used as speed-level to switch the processor voltage and frequency.
    Type: Grant
    Filed: February 20, 2008
    Date of Patent: November 13, 2012
    Assignee: Industrial Technology Research Institute
    Inventors: Yung-Cheng Ma, I-Yen Chen, Yen-Tun Peng, Chi-Lung Wang
  • Publication number: 20090106335
    Abstract: Disclosed is directed to a speed-level calculator and calculating method for dynamic voltage scaling. The speed-level calculator comprises a deadline counter, a shifter, and a fixed-point multiplier. The deadline counter calculates the residual time D from current time through to each task deadline for completing an episode. The shifter generates a D? value by shifting the D value to the right for e?m bits, and takes the decimal fraction part of the D? value for m bits. The speed-level calculator further comprises a saturation control circuit to detect if an overflow occurs on the D? value. According to a pre-calculated parameter ai corresponding to each task Ti, the fixed-point multiplier performs the multiplication of D? and ?i. After completing saturation and rounding on the multiplication result, a corresponding clock period is generated by taking the integer part. This clock period is used as speed-level to switch the processor voltage and frequency.
    Type: Application
    Filed: February 20, 2008
    Publication date: April 23, 2009
    Inventors: Yung-Cheng Ma, I-Yen Chen, Yen-Tun Peng, Chi-Lung Wang