Patents by Inventor Yen-Wei YEH

Yen-Wei YEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11790822
    Abstract: A display apparatus is provided. The display apparatus includes a display panel and a plurality of flexible printed circuit boards. The display panel has a fan-out area and a display area. The flexible printed circuit boards are coupled to the display panel. A first side of each flexible printed circuit board is configured with a plurality of first traces for transmitting a first group of clock signals among a plurality of clock signals, and a second side of each flexible printed circuit board opposite to the first side is configured with a plurality of second traces for transmitting a second group of clock signals among the clock signals. The first group of clock signals of one of the flexible printed circuit boards and the second group of clock signals of the adjacent flexible printed circuit board are transmitted to the display area through the fan-out area together.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: October 17, 2023
    Assignee: AUO Corporation
    Inventors: Yen-Wei Yeh, Wei-Li Lin
  • Patent number: 11443709
    Abstract: A display panel is provided. The display panel includes a plurality of scan lines and a gate driving circuit. The scan lines are disposed on the display panel along a first direction, and respectively provide a plurality of gate driving signals. The gate driving circuit is disposed on a first side of the display panel along a second direction. The second direction intersects the first direction. The gate driving circuit includes a plurality of bias generators and a plurality of signal output circuits. The signal output circuits are divided into a plurality of groups. The bias generators respectively correspond to the groups. The bias generators generate a plurality of first bias voltages. The groups generate the gate driving signals respectively according to the first bias voltages.
    Type: Grant
    Filed: August 4, 2021
    Date of Patent: September 13, 2022
    Assignee: Au Optronics Corporation
    Inventors: Che-Wei Tung, Wei-Li Lin, Chin-Hsien Chou, Yen-Wei Yeh
  • Publication number: 20220215809
    Abstract: A display panel is provided. The display panel includes a plurality of scan lines and a gate driving circuit. The scan lines are disposed on the display panel along a first direction, and respectively provide a plurality of gate driving signals. The gate driving circuit is disposed on a first side of the display panel along a second direction. The second direction intersects the first direction. The gate driving circuit includes a plurality of bias generators and a plurality of signal output circuits. The signal output circuits are divided into a plurality of groups. The bias generators respectively correspond to the groups. The bias generators generate a plurality of first bias voltages. The groups generate the gate driving signals respectively according to the first bias voltages.
    Type: Application
    Filed: August 4, 2021
    Publication date: July 7, 2022
    Applicant: Au Optronics Corporation
    Inventors: Che-Wei Tung, Wei-Li Lin, Chin-Hsien Chou, Yen-Wei Yeh
  • Patent number: 11158227
    Abstract: A wire component includes a plurality of working signal lines and a plurality of transmitting lines. The working signal lines are configured to respectively provide a plurality of working signals to a driving circuit, and phases of the working signals at least partially lag each other sequentially. The transmitting lines are configured to respectively transmit the working signals, and a portion of the transmitting lines crosses the working signal lines. A first working signal line is configured to provide a first working signal; a second working signal line is configured to provide a second working signal; the first working signal immediately lags the second working signal, and the first working signal line and the second working signal line are arranged with another working signal line therebetween.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: October 26, 2021
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yen-Wei Yeh, Chin-Hsien Chou, Wei-Li Lin
  • Publication number: 20210056881
    Abstract: A wire component includes a plurality of working signal lines and a plurality of transmitting lines. The working signal lines are configured to respectively provide a plurality of working signals to a driving circuit, and phases of the working signals at least partially lag each other sequentially. The transmitting lines are configured to respectively transmit the working signals, and a portion of the transmitting lines crosses the working signal lines. A first working signal line is configured to provide a first working signal; a second working signal line is configured to provide a second working signal; the first working signal immediately lags the second working signal, and the first working signal line and the second working signal line are arranged with another working signal line therebetween.
    Type: Application
    Filed: July 31, 2020
    Publication date: February 25, 2021
    Inventors: Yen-Wei YEH, Chin-Hsien CHOU, Wei-Li LIN