Abstract: A cell of a content-addressable memory (CAM) has a first switch, a second switch and a storage unit. A first end of the first switch and a first end of the second switch are coupled to a matchline. The first switch is controlled by a first search signal, and the second switch is controlled by a second search signal. The second search signal is complementary to the first search signal. The storage unit has a first inverter and a second inverter. The first inverter has a first latch node coupled to a second end of the first switch. The second inverter is cross-coupled to the first inverter and has a second latch node coupled to a second end of the second switch.

Abstract: A cell of a content-addressable memory (CAM) has a first switch, a second switch and a storage unit. A first end of the first switch and a first end of the second switch are coupled to a matchline. The first switch is controlled by a first search signal, and the second switch is controlled by a second search signal. The second search signal is complementary to the first search signal. The storage unit has a first inverter and a second inverter. The first inverter has a first latch node coupled to a second end of the first switch. The second inverter is cross-coupled to the first inverter and has a second latch node coupled to a second end of the second switch.

Abstract: A 6T static random access memory cell, array, and memory thereof are provided, in which the memory cell includes a first inverter, a second inverter, a first access transistor, and a second access transistor. A first high supply voltage and a low supply voltage are coupled to the first inverter. A second high supply voltage and the low supply voltage are coupled to the second inverter. The first access transistor has a gate terminal coupled to a first word line. The first access transistor has a source terminal coupled to the first node. The second access transistor has a gate terminal coupled to a second word line, and the second access transistor has a source terminal coupled to the second node. The first word line provides ON signals to turn on the first access transistor, and the second high supply voltage provides a first differential voltage simultaneously.