Abstract: A semiconductor component and a method of manufacturing the semiconductor component that reduces parasitic elements. A semiconductor chip is coupled to a semiconductor chip receiving area of a support structure. The semiconductor chip has at least two power semiconductor devices. A drain contact of a first power semiconductor device is coupled to a source contact of a second power semiconductor device and the drain and source contacts of the first and second power semiconductor devices are joined to the semiconductor chip receiving area. Another semiconductor chip may be bonded to a second semiconductor chip receiving area of the support structure. An energy storage element may be coupled between the source contact of the first power semiconductor device and the drain contact of the second semiconductor device. A protective structure may be formed over the semiconductor chips and the energy storage element.

Abstract: A semiconductor component and methods for manufacturing the semiconductor component that includes a monolithically integrated common mode choke. In accordance with embodiments, a transient voltage suppression device may be coupled to the monolithically integrated common mode choke.

Abstract: In one embodiment, a filter structure that integrates one plate of a capacitor with an electrode of a transient voltage device. The filter structure includes a well region of one conductivity type formed in semiconductor substrate of an opposite conductivity type. The well region forms one plate of the capacitor and an electrode of the transient voltage suppression device. A dielectric layer is formed over a portion of the well region and a conductive layer is formed overlying the dielectric layer to provide a second plate of the capacitor. The dopant concentration of the well region provides a constant capacitance/voltage characteristic for the filter structure when a selected voltage range is applied to plates of the capacitor.

Abstract: In one embodiment, a filter structure includes first and second filter devices formed using a semiconductor substrate. A vertical ground plane structure prevents cross-coupling between the first and second filter devices.

Abstract: A semiconductor component that includes a leadframe, a discrete passive circuit element, and an active circuit element. The discrete passive circuit element such as, for example, a discrete ferrite core inductor, is mounted either laterally or vertically adjacent to the leadframe. A semiconductor chip is attached to the discrete ferrite core inductor. Bond pads on the semiconductor chip may be electrically coupled to leads from the leadframe or to the discrete ferrite core inductor by wire bonds. The leadframe, discrete ferrite core inductor, semiconductor chip, and wire bonds are protected by an encapsulant such as a mold compound. Other passive circuit elements may be mounted to the discrete ferrite core inductor before encapsulation in the mold compound.

Abstract: In one embodiment, a split well region of one conductivity type is formed in semiconductor substrate of an opposite conductivity type. The split well region forms one plate of a floating capacitor and an electrode of a transient voltage suppression device.

Abstract: In one embodiment, a filter structure includes first and second filter devices formed using a semiconductor substrate. A vertical ground plane structure prevents cross-coupling between the first and second filter devices.

Abstract: In one embodiment, a well region of one conductivity type is formed in semiconductor substrate of an opposite conductivity type. The well region forms one plate of a floating capacitor and an electrode of a transient voltage suppression device.

Abstract: In one embodiment, a split well region of one conductivity type is formed in semiconductor substrate of an opposite conductivity type. The split well region forms one plate of a floating capacitor and an electrode of a transient voltage suppression device.

Abstract: A semiconductor device (10) includes a semiconductor die (20) and an inductor (30, 50) formed with a bonding wire (80) attached to a top surface (21) of the semiconductor die. The bonding wire is extended laterally a distance (L30, L150) greater than its height (H30, H50) to define an insulating core (31, 57). In one embodiment, the inductor is extended beyond an edge (35, 39) of the semiconductor die to reduce loading.

Abstract: A semiconductor device (10) includes a semiconductor die (20) and an inductor (30, 50) formed with a bonding wire (80) attached to a top surface (21) of the semiconductor die. The bonding wire is extended laterally a distance (L30, L150) greater than its height (H30, H50) to define an insulating core (31, 57). In one embodiment, the inductor is extended beyond an edge (35, 39) of the semiconductor die to reduce loading.