Abstract: A method of manufacturing a semiconductor device including a complementary metal oxide semiconductor (CMOS) and a bipolar junction transistor (BJT), the method comprising the steps of: forming a gate oxide layer on a substrate having a p-type and an n-type well; removing the gate oxide layer on the p-type well; forming bases on the p-type well; forming a first photosensitive layer pattern that exposes the bases on the substrate; implanting p-type impurity ions into the bases through the first photosensitive layer pattern; removing the first photosensitive layer pattern; forming a second photosensitive layer pattern that exposes the p-type and the n-type wells; and implanting n-type impurity ions into the p-type and the n-type wells through the second photosensitive layer pattern to form an emitter and a collector, respectively, to form the BJT. Therefore, CMOS manufacturing processes are used to form a high frequency BJT having improved frequency and noise characteristics.

Abstract: A method of manufacturing a semiconductor device including a complementary metal oxide semiconductor (CMOS) and a bipolar junction transistor (BJT), the method comprising the steps of: forming a gate oxide layer on a substrate having a p-type and an n-type well; removing the gate oxide layer on the p-type well; forming bases on the p-type well; forming a first photosensitive layer pattern that exposes the bases on the substrate; implanting p-type impurity ions into the bases through the first photosensitive layer pattern; removing the first photosensitive layer pattern; forming a second photosensitive layer pattern that exposes the p-type and the n-type wells; and implanting n-type impurity ions into the p-type and the n-type wells through the second photosensitive layer pattern to form an emitter and a collector, respectively, to form the BJT. Therefore, CMOS manufacturing processes are used to form a high frequency BJT having improved frequency and noise characteristics.

Abstract: An image sensor includes: a photodiode and a transistor formed in a semiconductor substrate that is defined as a device isolation region and an active region; a first interlayer insulating film formed over the semiconductor substrate; a metal wire formed over the first interlayer insulating film; a second interlayer insulating film formed over the first interlayer insulating film including the metal wire; and a color filter layer and a micro lens formed over the second interlayer insulating film. The first interlayer insulating film includes a first tetraethyl orthosilicate (TEOS) film, a first hydrogen silsequioxane (HSQ) film, and a second tetraethyl orthosilicate film, which are sequentially laminated.

Abstract: A method of manufacturing a semiconductor device including a complementary metal oxide semiconductor (CMOS) and a bipolar junction transistor (BJT), the method comprising the steps of: forming a gate oxide layer on a substrate having a p-type and an n-type well; removing the gate oxide layer on the p-type well; forming bases on the p-type well; forming a first photosensitive layer pattern that exposes the bases on the substrate; implanting p-type impurity ions into the bases through the first photosensitive layer pattern; removing the first photosensitive layer pattern; forming a second photosensitive layer pattern that exposes the p-type and the n-type wells; and implanting n-type impurity ions into the p-type and the n-type wells through the second photosensitive layer pattern to form an emitter and a collector, respectively, to form the BJT. Therefore, CMOS manufacturing processes are used to form a high frequency BJT having improved frequency and noise characteristics.

Abstract: A method of manufacturing an RF MOS semiconductor device includes: forming a gate stack including a gate oxide layer and a gate polysilicon layer on a silicon substrate; forming source/drain regions aligned with both sidewalls of the gate stack in the silicon substrate; forming spacers on both sidewalls of the gate stack, the spacers exposing upper parts of both sidewalls of the gate polysilicon layer; and forming metal silicide layers on a surface of the source/drain, a surface of the gate polysilicon layer, and the exposed upper parts of both sidewalls of the gate polysilicon layer.