Patents by Inventor Yeon Gyu LEE

Yeon Gyu LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145531
    Abstract: A method for fabricating a semiconductor device includes: forming a first oxide layer containing a first element over a first electrode layer; forming a second oxide layer containing a second element over the first oxide layer; forming a stacked structure in which a plurality of first oxide layers and a plurality of second oxide layers are alternately stacked by repeating the forming of the first oxide layer and the forming of the second oxide layer a plurality of times; and forming a second electrode layer over the stacked structure, wherein a thickness of a lowermost first oxide layer among the plurality of first oxide layers is greater than a thickness of each of other first oxide layers.
    Type: Application
    Filed: April 14, 2023
    Publication date: May 2, 2024
    Inventors: Jung Wook WOO, Sei Yon KIM, Min Chul SUNG, Yeon Gyu LEE, Do Hee KIM, Ja Yong KIM
  • Patent number: 11939698
    Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.
    Type: Grant
    Filed: November 3, 2020
    Date of Patent: March 26, 2024
    Assignee: SENIC INC.
    Inventors: Jong Hwi Park, Jung-Gyu Kim, Eun Su Yang, Byung Kyu Jang, Jung Woo Choi, Yeon Sik Lee, Sang Ki Ko, Kap-Ryeol Ku
  • Publication number: 20240076799
    Abstract: A wafer manufacturing method, an epitaxial wafer manufacturing method, and a wafer and epitaxial wafer manufactured thereby, are provided. The wafer manufacturing method enables the manufacture of a wafer with a low density of micropipe defects and minimum numbers of particles and scratches. The epitaxial wafer manufacturing method enables the manufacture of an epitaxial wafer that has low densities of defects such as downfall, triangular, and carrot defects, exhibits excellent device characteristics, and improves the yield of devices.
    Type: Application
    Filed: November 1, 2023
    Publication date: March 7, 2024
    Applicant: SENIC INC.
    Inventors: Jong Hwi PARK, Jung-Gyu KIM, Eun Su YANG, Byung Kyu JANG, Jung Woo CHOI, Yeon Sik LEE, Sang Ki KO, Kap-Ryeol KU