Patents by Inventor Yeon-Hong Kim
Yeon-Hong Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9553201Abstract: The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %.Type: GrantFiled: February 12, 2014Date of Patent: January 24, 2017Assignees: Samsung Display Co., Ltd., Kobe Steel, Ltd.Inventors: Byung Du Ahn, Ji Hun Lim, Gun Hee Kim, Kyoung Won Lee, Je Hun Lee, Hiroshi Goto, Aya Miki, Shinya Morita, Toshihiro Kugimiya, Yeon Hong Kim, Yeon Gon Mo, Kwang Suk Kim
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Patent number: 9502246Abstract: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to provide an intermediate device, and the semiconductor device may comprise an oxide active layer. The intermediate device may be subjected to ultraviolet (UV) light (e.g., ultraviolet ray irradiation process) for a first period, and subjected to heat (e.g., thermal treatment process) for a second period. The first and second periods may at least partly overlap.Type: GrantFiled: August 8, 2014Date of Patent: November 22, 2016Assignees: Samsung Display Co., Ltd., University-Industry Foundation (UIF), Yonsei UniversityInventors: Yeon-Hong Kim, Byung-Du Ahn, Hyeon-Sik Kim, Yeon-Gon Mo, Ji-Hun Lim, Hyun-Jae Kim
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Patent number: 9449990Abstract: Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.Type: GrantFiled: August 30, 2013Date of Patent: September 20, 2016Assignees: KOBE STEEL, LTD., Samsung Display Co., Ltd.Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Hiroaki Tao, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Jin Hyun Park, Yeon Hong Kim
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Publication number: 20160211384Abstract: In an oxide for a semiconductor layer of a thin film transistor according to the present invention, wherein metal elements constituting the oxide are In, Zn, and Sn, an oxygen partial pressure is 15% by volume or more when depositing the oxide in the semiconductor layer of the thin film transistor, and a defect density of the oxide satisfies 7.5×1015cm?3 or less, and a mobility satisfies 15 cm2/Vs or more.Type: ApplicationFiled: February 27, 2014Publication date: July 21, 2016Inventors: BYUNG DU AHN, GUN HEE KIM, YEON-HONG KIM, JIN HYUN PARK, SHUJI KOSAKA, KAZUSHI HAYASHI
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Patent number: 9324882Abstract: A thin film transistor containing at least, a gate electrode, a gate insulating film, an oxide semiconductor layer, source-drain electrode and a passivation film, in this order on a substrate. The oxide semiconductor layer is a laminate containing a first oxide semiconductor layer (IGZTO) and a second oxide semiconductor layer (IZTO). The second oxide semiconductor layer is formed on the gate insulating film, and the first oxide semiconductor layer is formed between the second oxide semiconductor layer and the passivation film. The contents of respective metal elements relative to the total amount of all the metal elements other than oxygen in the first oxide semiconductor layer are as follows; Ga: 8% or more and 30% or less; In: 25% or less, excluding 0%; Zn: 35% or more to 65% or less; and Sn: 5% or more to 30% or less.Type: GrantFiled: May 26, 2015Date of Patent: April 26, 2016Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.Inventors: Hiroshi Goto, Aya Miki, Tomoya Kishi, Kenta Hirose, Shinya Morita, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Yeon Hong Kim
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Publication number: 20150228674Abstract: Provided is a thin film transistor which is provided with an oxide semiconductor thin film layer and has a threshold voltage that does not change much due to light, a bias stress or the like, thereby exhibiting excellent stress stability. A thin film transistor of the present invention is provided with a gate electrode, an oxide semiconductor layer composed of a single layer which is used as a channel layer, an etch stopper layer to protect a surface of the oxide semiconductor layer, a source-drain electrode, and a gate insulator layer arranged between the gate electrode and the channel layer. The metal elements constituting the oxide semiconductor layer comprise In, Zn and Sn. The hydrogen concentration in the gate insulator layer in direct contact with the oxide semiconductor layer is controlled to 4 atomic % or lower.Type: ApplicationFiled: August 30, 2013Publication date: August 13, 2015Applicants: KABUSHIKI KAISHA KOBE SEIKO SHO (KOBE STEEL, LTD.), Samsung Display Co., Ltd.Inventors: Aya Miki, Shinya Morita, Hiroshi Goto, Hiroaki Tao, Toshihiro Kugimiya, Byung Du Ahn, Gun Hee Kim, Jin Hyun Park, Yeon Hong Kim
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Patent number: 9099360Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.Type: GrantFiled: July 17, 2014Date of Patent: August 4, 2015Assignee: Samsung Display Co., Ltd.Inventors: Je Hun Lee, Min Kyu Kim, Yeon Hong Kim, Yeon Gon Mo, Ki Ju Im
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Patent number: 9070777Abstract: A semiconductor device includes: a substrate, a semiconductor layer including an oxide semiconductor disposed on the substrate, a barrier layer disposed on the semiconductor layer and an insulating layer disposed on the barrier layer. The semiconductor layer includes an oxide semiconductor, and the barrier layer includes a material having a lower standard electrode potential than a semiconductor material of the oxide semiconductor, a lower electron affinity than the semiconductor material of the oxide semiconductor, or a larger band gap than the semiconductor material of the oxide semiconductor. The insulating layer includes at least one of a silicon-based oxide or a silicon-based nitride, and the insulating layer includes a portion which contacts with an upper surface of the barrier layer.Type: GrantFiled: July 6, 2012Date of Patent: June 30, 2015Assignee: Samsung Display Co., Ltd.Inventors: Gun Hee Kim, Jae Woo Park, Jin Hyun Park, Byung Du Ahn, Je Hun Lee, Yeon Hong Kim, Jung Hwa Kim, Sei-Yong Park, Jun Hyun Park, Kyoung Won Lee, Ji Hun Lim
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Publication number: 20150144941Abstract: Disclosed is a display substrate including a driving unit on a substrate comprising a first thin film transistor and a display unit on the substrate being adjacent to the driving unit and comprising a second thin film transistor.Type: ApplicationFiled: October 10, 2014Publication date: May 28, 2015Inventors: Masataka KANO, Sang-Ho PARK, So-Young KOO, Myoung-Hwa KIM, Yeon-Hong KIM, Jung-Hun NOH, Jun-Hyung LIM, Sang-Hee JANG
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Publication number: 20150140699Abstract: A method of forming an oxide semiconductor device may be provided. In the method, a substrate comprising a first major surface and a second major surface that faces away from the first major surface may be provided. An oxide semiconductor device may be formed over the first major surface to provide an intermediate device, and the semiconductor device may comprise an oxide active layer. The intermediate device may be subjected to ultraviolet (UV) light (e.g., ultraviolet ray irradiation process) for a first period, and subjected to heat (e.g., thermal treatment process) for a second period. The first and second periods may at least partly overlap.Type: ApplicationFiled: August 8, 2014Publication date: May 21, 2015Inventors: Yeon-Hong Kim, Byung-Du AHN, Hyeon-Sik KIM, Yeon-Gon MO, Ji-Hun LIM, Hyun-Jae KIM
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Publication number: 20150115257Abstract: A display device and a manufacturing method thereof with improved performance and low manufacturing complexity are provided. One inventive aspect includes: a first control electrode, a semiconductor layer, an etch stop layer, a first input electrode and a first output electrode, a third control electrode, a passivation layer and a pixel electrode. The third control electrode is formed on the etch stop layer. The passivation layer is formed on the first electrode, the first output electrode and the third control electrode. The pixel electrode is formed on the passivation layer and connects to the first output electrode.Type: ApplicationFiled: July 17, 2014Publication date: April 30, 2015Inventors: Je Hun Lee, Min Kyu Kim, Yeon Hong Kim, Yeon Gon Mo, Ki Ju Im
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Publication number: 20140167038Abstract: The inventive concept relates to a thin film transistor and a thin film transistor array panel and, in detail, relates to a thin film transistor including an oxide semiconductor. A thin film transistor according to an exemplary embodiment of the inventive concept includes: a gate electrode; a gate insulating layer positioned on or under the gate electrode; a first semiconductor and a second semiconductor that overlap the gate electrode with the gate insulating layer interposed therebetween, the first semiconductor and the second semiconductor contacting each other; a source electrode connected to the second semiconductor; and a drain electrode connected to the second semiconductor and facing the source electrode, wherein the second semiconductor includes gallium (Ga) that is not included in the first semiconductor, and a content of gallium (Ga) in the second semiconductor is greater than 0 at. % and less than or equal to about 33 at. %.Type: ApplicationFiled: February 12, 2014Publication date: June 19, 2014Applicant: KABUSHIKI KAISHA KOBE SEIKO SHO (Kobe Steel, Ltd.)Inventors: Byung Du AHN, Ji Hun LIM, Gun Hee KIM, Kyoung Won LEE, Je Hun LEE, HIROSHI GOTO, AYA MIKI, SHINYA MORITA, TOSHIHIRO KUGIMIYA, Yeon Hong KIM, Yeon Gon MO, Kwang Suk KIM
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Patent number: 8492770Abstract: A thin film transistor includes a gate electrode formed on a substrate, a semiconductor pattern overlapped with the gate electrode, a source electrode overlapped with a first end of the semiconductor pattern and a drain electrode overlapped with a second end of the semiconductor pattern and spaced apart from the source electrode. The semiconductor pattern includes an amorphous multi-elements compound including a II B element and a VI A element or including a III A element and a V A element and having an electron mobility no less than 1.0 cm2/Vs and an amorphous phase, wherein the VI A element excludes oxygen. Thus, a driving characteristic of the thin film transistor may be improved.Type: GrantFiled: February 25, 2011Date of Patent: July 23, 2013Assignee: Samsung Display Co., Ltd.Inventors: Jae-Woo Park, Je-Hun Lee, Seong-Jin Lee, Yeon-Hong Kim
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Publication number: 20130181212Abstract: A semiconductor device includes: a substrate, a semiconductor layer including an oxide semiconductor disposed on the substrate, a barrier layer disposed on the semiconductor layer and an insulating layer disposed on the barrier layer. The semiconductor layer includes an oxide semiconductor, and the barrier layer includes a material having a lower standard electrode potential than a semiconductor material of the oxide semiconductor, a lower electron affinity than the semiconductor material of the oxide semiconductor, or a larger band gap than the semiconductor material of the oxide semiconductor. The insulating layer includes at least one of a silicon-based oxide or a silicon-based nitride, and the insulating layer includes a portion which contacts with an upper surface of the barrier layer.Type: ApplicationFiled: July 6, 2012Publication date: July 18, 2013Inventors: Gun Hee KIM, Jae Woo PARK, Jin Hyun PARK, Byung Du AHN, Je Hun LEE, Yeon Hong KIM, Jung Hwa KIM, Sei-Yong PARK, Jun Hyun PARK, Kyoung Won LEE, Ji Hun LIM
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Patent number: 8450850Abstract: Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film.Type: GrantFiled: July 28, 2011Date of Patent: May 28, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hong Long Ning, Chang-Oh Jeong, Ji-Young Park, Sang-Gab Kim, Sung-Haeng Cho, Yeon-Hong Kim, Jin-Su Byun
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Publication number: 20120112346Abstract: Provided are a thin-film transistor (TFT) substrate and a method of manufacturing the same. The method includes: forming a passivation film by forming an insulating film on a substrate; forming a photoresist pattern by forming a photoresist film on the passivation film, exposing the photoresist film to light, and developing the photoresist film; performing a first dry-etching by dry-etching the passivation film using the photoresist pattern as an etch mask; performing a baking to reduce a size of the photoresist pattern; performing a second dry-etching to form a contact hole by dry-etching the passivation film again using the photoresist pattern as a mask; removing the photoresist pattern; and forming a pixel electrode of a carbon composition that includes carbon nanotubes and/or graphene on a top surface of the passivation film.Type: ApplicationFiled: July 28, 2011Publication date: May 10, 2012Inventors: Hong Long NING, Chang-Oh Jeong, Ji-Young Park, Sang-Gab Kim, Sung-Haeng Cho, Yeon-Hong Kim, Jin-Su Byun
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Publication number: 20110215322Abstract: A thin film transistor includes a gate electrode formed on a substrate, a semiconductor pattern overlapped with the gate electrode, a source electrode overlapped with a first end of the semiconductor pattern and a drain electrode overlapped with a second end of the semiconductor pattern and spaced apart from the source electrode. The semiconductor pattern includes an amorphous multi-elements compound including a II B element and a VI A element or including a III A element and a V A element and having an electron mobility no less than 1.0 cm2/Vs and an amorphous phase, wherein the VI A element excludes oxygen. Thus, a driving characteristic of the thin film transistor may be improved.Type: ApplicationFiled: February 25, 2011Publication date: September 8, 2011Inventors: Jae-Woo Park, Je-Hun Lee, Seong-Jin Yeon, Yeon-Hong Kim