Abstract: Provided are an autonomous driving system and a correction learning method for autonomous driving. The autonomous driving system includes a sensor configured to collect and output data required for autonomous driving, a first processor configured to output autonomous driving data on the basis of data input from the sensor, a second processor configured to output a driving data adjustment value on the basis of differences between the data input from the sensor, the autonomous driving data input from the first processor, and driving data input from driving by a human driver, and a driving part configured to perform driving on the basis of the autonomous driving data output from the first processor and the driving data adjustment value output from the second processor.

Abstract: A neuromorphic device includes: a neuron block unit including a plurality of neurons; a synapse block unit including a plurality of synapses; and a topology block unit including a plurality of parallel Look-Up Table (LUT) modules including pre and post neuron elements configured with addresses of a presynaptic neuron and a postsynaptic neuron. Each of the plurality of neurons has an intrinsic address, each of the plurality of synapses has an intrinsic address. The parallel LUT module is partitioned based on a first synapse address among synapse addresses, and each of the partitions is indexed based on a second synapse address among the synapse addresses.

Abstract: Provided is a method of operating a neuron in a neuromorphic system. The method includes evaluating a membrane potential value at a corresponding time when receiving an input spike, time-modulating a synaptic weight of the membrane potential value and converting the time-modulated synaptic weight into a membrane potential value at a reference time, and generating an output spike when the membrane potential value at the reference time exceeds a certain threshold value. The membrane potential value at the reference time is represented by a floating point number including a predetermined bit of exponent and mantissa, and the floating point number includes time information. The method further includes accessing a memory and scanning a neural state variable when a timer is updated to “0” to update the neural state variable to an updated value at a reference time.

Abstract: A semiconductor device includes a plurality of memory blocks each including a plurality of memory cells, a circuit group performing a program operation, a read operation and an erase operation on a selected memory block, among the plurality of memory blocks, and a control circuit controlling the circuit group to program the memory cells of the selected memory block in a healing pattern. The healing pattern is programmed before a subsequent program operation is performed on the selected memory block. The memory cells of the healing pattern include erased memory cells and programmed memory cells arranged alternately.

Abstract: A method of operating a semiconductor device includes programming a first cell, verifying a second cell adjacent to the first cell, and repeating the programming of the first cell and the verifying of the second cell until the verifying of the second cell passes.

Abstract: A memory system and a method for operating the same are provided. The memory system includes a semiconductor memory device suitable for performing an erase operation in response to a control signal, and if an erase command is input from a host, a controller suitable for temporarily storing erase block information according the erase command, and when a program command is input after the erase command is input, transmitting the control signal according to the erase command to the semiconductor memory device.

Abstract: A semiconductor device includes a plurality of memory blocks each including a plurality of memory cells, a circuit group performing a program operation, a read operation and an erase operation on a selected memory block, among the plurality of memory blocks, and a control circuit controlling the circuit group to program the memory cells of the selected memory block in a healing pattern, before the program operation is performed on the selected memory block, wherein the memory cells of the healing pattern include erased memory cells and programmed memory cells arranged alternately.

Abstract: A memory system and a method for operating the same are provided. The memory system includes a semiconductor memory device suitable for performing an erase operation in response to a control signal, and if an erase command is input from a host, a controller suitable for temporarily storing erase block information according the erase command, and when a program command is input after the erase command is input, transmitting the control signal according to the erase command to the semiconductor memory device.