Patents by Inventor Yeon-kyu Moon
Yeon-kyu Moon has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10115365Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.Type: GrantFiled: August 8, 2016Date of Patent: October 30, 2018Assignee: Samsung Display Co., Ltd.Inventors: Beom-Jun Kim, Myung-Koo Hur, Bong-Jun Lee, Yeon-Kyu Moon, Myung-Sub Lee, Gyu-Tae Kim
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Patent number: 9647243Abstract: A display apparatus includes a pixel part disposed in a display area of a base substrate, including a switching element connected to a signal line, a pixel electrode connected to the switching element and a common electrode that overlaps the pixel electrode, a plurality of fan-out lines disposed in a peripheral area of the base substrate that are connected to the signal line of the display area, a plurality of pads disposed in the peripheral area of the base substrate that are respectively connected to end portions of the fan-out lines, an organic layer that covers the switching element of the display area and that extends from the display area to a portion of the fan-out lines, and an electrode pattern that overlaps the fan-out lines in a boundary portion of the organic layer.Type: GrantFiled: March 14, 2014Date of Patent: May 9, 2017Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Soon-Wook Hong, Seung-Sok Son, Yeon-Kyu Moon, Jae-Hyun Park, Kap-Soo Yoon, Jin-Won Lee
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Publication number: 20160351158Abstract: A gate driving circuit including a plurality of stages connected with each other and configured to output a plurality of gate signals. An n-th (n is a natural number) stage including a gate output part including a first transistor connected between a clock signal and an output node outputting an n-th gate signal, the first transistor having a gate electrode connected to a control node, a carry part connected between the clock signal and a carry node outputting an n-th carry signal, a first node control part connected between the output node and a first low voltage, and a second node control part including at least one transistor connected between the control node and a second low voltage different from the first low voltage.Type: ApplicationFiled: August 8, 2016Publication date: December 1, 2016Inventors: Beom-Jun KIM, Myung-Koo HUR, Bong-Jun LEE, Yeon-Kyu MOON, Myung-Sub LEE, Gyu-Tae KIM
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Patent number: 9412315Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.Type: GrantFiled: May 31, 2012Date of Patent: August 9, 2016Assignee: Samsung Display Co., Ltd.Inventors: Beom-Jun Kim, Myung-Koo Hur, Bong-Jun Lee, Yeon-Kyu Moon, Myung-Sub Lee, Gyu-Tae Kim
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Publication number: 20140284574Abstract: A display apparatus includes a pixel part disposed in a display area of a base substrate, including a switching element connected to a signal line, a pixel electrode connected to the switching element and a common electrode that overlaps the pixel electrode, a plurality of fan-out lines disposed in a peripheral area of the base substrate that are connected to the signal line of the display area, a plurality of pads disposed in the peripheral area of the base substrate that are respectively connected to end portions of the fan-out lines, an organic layer that covers the switching element of the display area and that extends from the display area to a portion of the fan-out lines, and an electrode pattern that overlaps the fan-out lines in a boundary portion of the organic layer.Type: ApplicationFiled: March 14, 2014Publication date: September 25, 2014Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Soon-Wook Hong, Seung-Sok Son, Yeon-Kyu Moon, Jae-Hyun Park, Kap-Soo Yoon, Jin-Won Lee
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Patent number: 8565370Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.Type: GrantFiled: September 12, 2012Date of Patent: October 22, 2013Assignee: Samsung Display Co., Ltd.Inventors: Hong-Woo Lee, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
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Publication number: 20130141318Abstract: A gate driving circuit is provided which includes a plurality of stages cascade-connected with each other and outputting a plurality of gate signals. An n-th (n is a natural number) stage includes a gate output part, a first node control part and a carry part. The gate output part includes a first transistor. The first transistor outputs a high voltage of a clock signal to a high voltage of an n-th gate signal in response to a high voltage of a control node. The first node control part is connected to the control node to control a signal of the control node and includes at least one transistor having a channel longer than the channel length of the first transistor. The carry part outputs the high voltage of the clock signal to an n-th carry signal in response to the signal of the control node.Type: ApplicationFiled: May 31, 2012Publication date: June 6, 2013Applicant: SAMSUNG DISPLAY CO., LTD.Inventors: Beom-Jun KIM, Myung-Koo HUR, Bong-Jun LEE, Yeon-Kyu MOON, Myung-Sub LEE, Gyu-Tae KIM
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Publication number: 20130027287Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.Type: ApplicationFiled: October 4, 2012Publication date: January 31, 2013Inventors: Min-Cheol LEE, Byeong-Jae AHN, Jong-Hwan LEE, Yeon-Kyu MOON, Jong-Hyuk LEE
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Publication number: 20130002309Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.Type: ApplicationFiled: September 12, 2012Publication date: January 3, 2013Inventors: HONG-WOO LEE, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
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Patent number: 8305323Abstract: A display apparatus includes a gate driver which sequentially outputs a gate signal at a high state in response to a gate control signal and a data driver which converts image data into a data signal in response to a data control signal. The display apparatus further includes a display panel which includes a plurality of gate lines which sequentially receive the gate signal, a plurality of data lines which receive the data signal and a plurality of pixels connected to the gate and data lines and which receive the data signal in response to the gate signal to display an image. The polarity of the data signal is inverted after the gate signal transitions to a low state.Type: GrantFiled: December 19, 2007Date of Patent: November 6, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Min-Cheol Lee, Byeong-Jae Ahn, Jong-Hwan Lee, Yeon-Kyu Moon, Jong-Hyuk Lee
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Patent number: 8306177Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.Type: GrantFiled: October 8, 2009Date of Patent: November 6, 2012Assignee: Samsung Display Co., Ltd.Inventors: Hong-Woo Lee, Sung-Man Kim, Jong-Hyuk Lee, Jong-Hwan Lee, Hyeon-Hwan Kim, Sang-Moon Moh, Jeong-Il Kim, Yeon-Kyu Moon
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Patent number: 8179350Abstract: A display device including a plurality of pixel electrodes arranged in a matrix including rows and columns and a plurality switching elements coupled with the pixel electrodes; a plurality of gate lines coupled with the switching elements and extending in a row direction, at least two gate lines assigned to a row; and a plurality of data lines coupled with the switching elements and extending in a column direction, a data line assigned to at least two columns, wherein each of the pixel electrodes has a first side and a second side that is farther from a data line than the first side, and the switching elements are disposed near the second sides of the pixel electrodes.Type: GrantFiled: September 12, 2005Date of Patent: May 15, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Haeng-Won Park, Seong-Young Lee, Yong-Soon Lee, Nam-Soo Kang, Seung-Hwan Moon, Bong-Jun Lee, Sung-Man Kim, Beom-Jun Kim, Yeon-Kyu Moon, Hyeong-Jun Park, Shin-Tack Kang
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Patent number: 8174478Abstract: A gate driving circuit and a display apparatus having the gate driving circuit include a pull-up part and a carry part pull up a present gate signal and a present carry signal, respectively, to a first clock during a first period within one frame. A pull-down part receives a next gate signal to discharge the present gate signal to a source power voltage. A pull-up driving part is connected to control terminals of the carry part and pull-up part (Q-node) to turn the carry part and pull-up part on and off. A floating preventing part prevents an output terminal of the carry part from being floated in response to the first clock during a second period within the one frame.Type: GrantFiled: June 8, 2007Date of Patent: May 8, 2012Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Man Kim, Hong-Woo Lee, Byeong-Jae Ahn, Young-Geol Song, Bong-Jun Lee, Yeon-Kyu Moon, Kyung-Wook Kim, Jin-Suk Seo
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Patent number: 8085380Abstract: A spacer includes a spacer main body and a coating layer. The coating layer encompasses the spacer main body and comprises a dendrimer.Type: GrantFiled: October 31, 2007Date of Patent: December 27, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Yeon-Kyu Moon, Yeon-Cu Kim, Young-Kuil Joo
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Patent number: 8023058Abstract: A panel assembly for a display device and a display device having the panel assembly are provided. The panel assembly for a display device includes a display region including a plurality of pixels and most of display signal lines connected to the pixels, a plurality of repair lines disposed in a shape of a ring in a peripheral region outside of the display region, and first to third auxiliary repair lines disposed in the peripheral region in parallel to data lines. An additional auxiliary repair line is provided at a right side of each of the data driving IC regions. By doing so, occurrence of disconnection and success in repairing the disconnected data lines of a display penal which is mounted in a COG scheme is tested by using a TCP type of test unit, so that it is possible to greatly reduce production costs involved in the COG type test unit.Type: GrantFiled: February 7, 2006Date of Patent: September 20, 2011Assignee: Samsung Electronics Co., Ltd.Inventors: Hye-Rhee Han, Yeon-Kyu Moon, Kyoung-Jun Jang
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Publication number: 20100158188Abstract: A pull-up driving part maintains a signal of a first node at a high level by receiving a turn-on voltage in response to one of a previous stage or a vertical start signal. A pull-up part outputs a clock signal through an output terminal in response to the signal of the first node. A first holding part maintains a signal of a second node at a high level or a low level when the signal of the first node is respectively low or high. A second holding part maintains the signal of the first node and a signal of the output terminal at a ground voltage in response to the signal of the second node or a delayed and inverted clock signal.Type: ApplicationFiled: October 8, 2009Publication date: June 24, 2010Inventors: Hong-Woo LEE, Sung-Man KIM, Jong-Hyuk LEE, Jong-Hwan LEE, Hyeon-Hwan KIM, Sang-Moon MOH, Jeong-Il KIM, Yeon-Kyu MOON
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Patent number: 7709080Abstract: Disclosed is a display device. The display device includes first and second substrates facing each other, a sealant pattern including a first compound attaching the first and the second substrates together, and a separator pattern within the sealant pattern. The separator pattern includes a second compound chemically reacting with the first compound to block the diffusion of the first compound.Type: GrantFiled: March 23, 2007Date of Patent: May 4, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Yeon-Cu Kim, Young-Geol Song, Yeon-Kyu Moon, Jung-Im Kim
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Patent number: 7710527Abstract: A thin film transistor substrate includes; a substrate, a plurality of gate lines disposed on the substrate, a plurality of data lines disposed substantially perpendicular to the gate lines, wherein the plurality of data liens include a plurality of outermost data lines, a plurality of thin film transistors (“TFTs”) connected to the gate and data lines, a plurality of pixel electrodes connected to the plurality of TFTs, and a plurality of dummy patterns connected to the outermost data lines.Type: GrantFiled: October 31, 2007Date of Patent: May 4, 2010Assignee: Samsung Electronics Co., Ltd.Inventors: Hong Woo Lee, Jong Hwan Lee, Sang Youn Han, Sung Man Kim, Yeon Kyu Moon
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Patent number: 7522226Abstract: A liquid crystal display (“LCD”) includes a data interconnection line including a data line, a source electrode as a branch of the data line, and a drain electrode formed spaced apart from the source electrode, a semiconductor layer formed under the data interconnection line and connected to the source electrode and the drain electrode below the source electrode and the drain electrode and forming a channel region, and a gate interconnection line formed under the semiconductor layer and including a gate line intersecting the data line, the gate line extending in a first direction and the data line extending in a second direction, and a gate electrode branched from the gate line, wherein the gate line includes a first recess having a first width and a first length.Type: GrantFiled: August 11, 2006Date of Patent: April 21, 2009Assignee: Samsung Electronics Co., Ltd.Inventors: Hyeong-jun Park, Kyung-wook Kim, Byeong-jae Ahn, Bong-jun Lee, Yeon-kyu Moon
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Publication number: 20090009698Abstract: A liquid crystal display panel includes an array substrate, an opposite substrate, and a color filter arranged on at least one of the array substrate and the opposite substrate. The color filter includes at least one diffusion preventing member that extends in a direction in which a combining member overlaps a driver.Type: ApplicationFiled: July 1, 2008Publication date: January 8, 2009Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Yeon-Kyu MOON, Jong-Hwan LEE, Byeong-Jae AHN, Yeon-Cu KIM, Hong-Woo LEE, Jong Hyuk LEE