Patents by Inventor Yeon Mo
Yeon Mo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12002249Abstract: There is provided a deep learning-based overlay key centering system and a method thereof that may precisely measure and examine an alignment state of fine patterns of a semiconductor substrate. The method includes collecting an input data set from at least one device, the input data set comprising measurement image data of an overlay key and label data including information on a position and bounding box size of the overlay; and training the model by inputting the input data set to a model for deep learning. The step of training the model may include a step of calculating a loss function by comparing result data predicted by the model with the label data; and a step of optimizing an algorithm of the model by modifying a weight of the model so that a loss value calculated with the loss function may become smaller than a reference value.Type: GrantFiled: May 3, 2023Date of Patent: June 4, 2024Assignee: AUROS TECHNOLOGY, INC.Inventors: Soo-Yeon Mo, Ga-Min Kim, Hyo-Sik Ham
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Publication number: 20240161441Abstract: There is provided a deep learning-based overlay key centering system and a method thereof that may precisely measure and examine an alignment state of fine patterns of a semiconductor substrate. The method includes collecting an input data set from at least one device, the input data set comprising measurement image data of an overlay key and label data including information on a position and bounding box size of the overlay; and training the model by inputting the input data set to a model for deep learning. The step of training the model may include a step of calculating a loss function by comparing result data predicted by the model with the label data; and a step of optimizing an algorithm of the model by modifying a weight of the model so that a loss value calculated with the loss function may become smaller than a reference value.Type: ApplicationFiled: May 3, 2023Publication date: May 16, 2024Applicant: AUROS TECHNOLOGY, INC.Inventors: Soo-Yeon MO, Ga-Min KIM, Hyo-Sik HAM
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Patent number: 11847777Abstract: A method of centering a correlation-based overlay includes resizing an overlay target image to a size smaller than an entire image size, defining first and second templates that are symmetrical to each other based on a diagonal in the resized image, and calculating a rough center coordinate by calculating a first correlation value representing a similarity symmetrical with respect to the diagonal between images of the first and second templates; defining first and second templates symmetrical based on a diagonal passing through the rough center coordinates in an original image of the overlay target image, calculating a fine center coordinate of the overlay target image by calculating a second correlation value representing a similarity symmetrical with respect to the diagonal between the images of the first and second templates; and centering an overlay key by moving a stage to a target position based on the fine center coordinates.Type: GrantFiled: July 17, 2023Date of Patent: December 19, 2023Assignee: AUROS TECHNOLOGY, INC.Inventors: Soo-Yeon Mo, Hee-Chul Lim
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Patent number: 10410381Abstract: Provided are tomographic image processing apparatus and method. The tomographic image processing apparatus includes: a processor configured to generate a plurality of preview images by applying a plurality of filters to second raw data corresponding to a selected cross-section of an object and reconstruct a tomographic image by applying one of the plurality of filters, which is used to generate a preview image selected from among the plurality of preview images, to first raw data corresponding to a region of the object including the selected cross-section; and a display configured to display the reconstructed tomographic image.Type: GrantFiled: August 4, 2017Date of Patent: September 10, 2019Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Park, Yeon-mo Jeong
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Patent number: 10157481Abstract: An apparatus for processing a medical image includes an image processor including a plurality of processors, the plurality of processors configured to reconstruct a cross-sectional image of an object by performing a first operation having a first priority and a second operation having a second priority that is lower than the first priority, and a controller configured to monitor whether a malfunction occurs among the plurality of processors, and configured to assign, to at least one of the plurality of processors, at least one of the first operation and the second operation to be performed, based on a result of monitoring of the plurality of processors.Type: GrantFiled: May 4, 2018Date of Patent: December 18, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Jun-young Park, Nasir Desai, Yeon-mo Jeong, Abhinav Mehrotra
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Publication number: 20180253870Abstract: An apparatus for processing a medical image includes an image processor including a plurality of processors, the plurality of processors configured to reconstruct a cross-sectional image of an object by performing a first operation having a first priority and a second operation having a second priority that is lower than the first priority, and a controller configured to monitor whether a malfunction occurs among the plurality of processors, and configured to assign, to at least one of the plurality of processors, at least one of the first operation and the second operation to be performed, based on a result of monitoring of the plurality of processors.Type: ApplicationFiled: May 4, 2018Publication date: September 6, 2018Inventors: Jun-young PARK, Nasir DESAI, Yeon-mo JEONG, Abhinav MEHROTRA
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Patent number: 9990742Abstract: An apparatus for processing a medical image includes an image processor including a plurality of processors, the plurality of processors configured to reconstruct a cross-sectional image of an object by performing a first operation having a first priority and a second operation having a second priority that is lower than the first priority, and a controller configured to monitor whether a malfunction occurs among the plurality of processors, and configured to assign, to at least one of the plurality of processors, at least one of the first operation and the second operation to be performed, based on a result of monitoring of the plurality of processors.Type: GrantFiled: September 23, 2015Date of Patent: June 5, 2018Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-young Park, Nasir Desai, Yeon-mo Jeong, Abhinav Mehrotra
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Publication number: 20180047188Abstract: Provided are tomographic image processing apparatus and method. The tomographic image processing apparatus includes: a processor configured to generate a plurality of preview images by applying a plurality of filters to second raw data corresponding to a selected cross-section of an object and reconstruct a tomographic image by applying one of the plurality of filters, which is used to generate a preview image selected from among the plurality of preview images, to first raw data corresponding to a region of the object including the selected cross-section; and a display configured to display the reconstructed tomographic image.Type: ApplicationFiled: August 4, 2017Publication date: February 15, 2018Inventors: Jun-young PARK, Yeon-mo JEONG
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Publication number: 20160086357Abstract: An apparatus for processing a medical image includes an image processor including a plurality of processors, the plurality of processors configured to reconstruct a cross-sectional image of an object by performing a first operation having a first priority and a second operation having a second priority that is lower than the first priority, and a controller configured to monitor whether a malfunction occurs among the plurality of processors, and configured to assign, to at least one of the plurality of processors, at least one of the first operation and the second operation to be performed, based on a result of monitoring of the plurality of processors.Type: ApplicationFiled: September 23, 2015Publication date: March 24, 2016Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-young PARK, Nasir DESAI, Yeon-mo JEONG, Abhinav MEHROTRA
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Publication number: 20070131932Abstract: A static electricity preventing assembly for an electronic device, may include a substrate, a buffer layer on the substrate, the buffer layer including a plurality of contact holes exposing respective regions of the substrate, a shorting bar on the buffer layer, pad electrodes on the buffer layer, metal wiring lines on the buffer layer, wherein a first portion of each of the metal wiring lines may be electrically connected to the substrate through the contact holes, a second portion of each of the metal wiring lines may be connected to a respective one of the pad electrodes, and a third portion of each of the metal wiring lines may be connected to the shorting bar, wherein the first portion may be between the second portion and the third portion.Type: ApplicationFiled: December 8, 2006Publication date: June 14, 2007Inventors: Hyun Shin, Yeon Mo, Jae Jeong, Se Kwon
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Publication number: 20070108472Abstract: A thin film transistor (TFT) and a method of manufacturing the same, and more particularly, a TFT for reducing leakage current and a method of manufacturing the same are provided. The TFT includes a flexible substrate, a diffusion preventing layer formed on the flexible substrate, a buffer layer formed of at least two insulated materials on the diffusion preventing layer, a semiconductor layer formed on a region of the buffer layer to include a channel layer and a source and drain region, a gate insulating layer formed on the buffer layer including the semiconductor layer, a gate electrode formed on the gate insulating layer in a region corresponding to the channel layer, an interlayer insulating layer formed on the gate insulating layer including the gate electrode, and source and drain electrodes formed in the interlayer insulating layer to include a predetermined contact hole that exposes at least a region of the source and drain region and to be connected to the source and drain region.Type: ApplicationFiled: August 22, 2006Publication date: May 17, 2007Inventors: Jae Jeong, Hyun Shin, Se Kwon, Yeon Mo
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Publication number: 20070075943Abstract: The flat panel display includes an electrochromic device that is a controlling unit. The electrochromic device reversibly makes electrolytic oxidizing and reducing reactions so that coloring and decoloring can be made reversibly, when voltage is applied. With such the construction, the flat panel display controls the voltage applied to the electrochromic device, enabling to selectively display an image on front side or two sides.Type: ApplicationFiled: September 28, 2006Publication date: April 5, 2007Inventors: Hyun Shin, Jae Jeong, Yeon Mo, Dong Jin
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Publication number: 20070069995Abstract: The present invention relates to a flat panel display and a method of driving the same for maximizing the effect of two direction emission in the flat panel display that uses a transparent thin film transistor. The flat panel display of the present invention comprises a transparent emission panel that includes a transparent thin film transistor, and a controlling unit provided on bottom of the transparent emission panel to control transmission of light. With such the construction, the flat panel display enable to freely display an image at one surface or at both of two surfaces depending on a user's desired time schedule, while maintaining a transparent state at ordinary times. In an embodiment of this invention, an organic light emitting device is used as the emission panel and an electrophoretic device is used as the controlling unit.Type: ApplicationFiled: September 28, 2006Publication date: March 29, 2007Inventors: Hyun Shin, Jae Jeong, Yeon Mo, Dong Jin
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Publication number: 20070057261Abstract: A transparent thin film transistor (TFT) and its method of manufacture includes: a substrate, a transparent semiconductor layer formed by coating the substrate with an oxide, a nitride, or a carbide to pattern the material, a gate insulating layer formed on the transparent semiconductor layer, a gate electrode formed on the gate insulating layer to correspond to the transparent semiconductor layer, an interlayer insulating layer formed on the gate electrode, and source and drain electrodes electrically connected to the transparent semiconductor layer through contact holes formed in the interlayer insulating layer and the gate insulating layer.Type: ApplicationFiled: August 31, 2006Publication date: March 15, 2007Inventors: Jae Jeong, Hyun Shin, Yeon Mo
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Publication number: 20070057932Abstract: The present invention relates to a flat panel display and an organic light emitting display which maintains an opaque state depending on a user's desired time point or an established time point, while maintaining a transparent state at ordinary times, by forming a transparent two side emission panel and a control unit on the lower portion of the transparent two side emission panel, enabling to freely display an image in two side or one side. A flat panel display (FPD) of the present invention is constructed with a transparent two side emission panel and a control unit provided on at least one side of the transparent two side emission panel to control transmission of light. The control unit controlling an array of liquid crystal layers depending on voltage applied to the liquid crystal layers and transmission of light by a first polarizing member and a second polarizing member.Type: ApplicationFiled: September 13, 2006Publication date: March 15, 2007Inventors: Hyun Shin, Jae Jeong, Yeon Mo, Dong Jin
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Publication number: 20070040175Abstract: A polysilicon thin film transistor (TFT) may include a substrate, at least one insulating layer, a semiconductor layer, a gate electrode, a source electrode, a drain electrode, and a heat retaining layer formed to contact the semiconductor layer. The heat retaining layer may reduce and/or prevent a reduction in a melt duration time of amorphous silicon during a crystallization process for forming a polysilicon layer of the TFT.Type: ApplicationFiled: August 22, 2006Publication date: February 22, 2007Inventors: Jae Jeong, Hyun Shin, Yeon Mo
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Publication number: 20070024187Abstract: An Organic Light Emitting Display (OLED) and its method of fabrication includes: a transparent substrate; a photochromatic layer formed on a first surface of the transparent substrate; at least one transparent Thin Film Transistor (TFT) formed on a first surface of the transparent substrate, and an organic light emitting device formed on and electrically connected to the transparent TFT.Type: ApplicationFiled: July 27, 2006Publication date: February 1, 2007Inventors: Hyun Shin, Jae Jeong, Yeon Mo, Dong Jin
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Publication number: 20070018170Abstract: An organic light emitting display device including a flexible substrate and a plurality of thin film transistors (TFTs) formed on the substrate. The plurality of TFTs formed on the substrate include a pixel transistor for driving a pixel and a driver circuit transistor for driving a driver circuit, and a longitudinal direction of a channel region of the pixel transistor makes a first predetermined angle with a direction in which the substrate is bent. As such, it is possible to minimize a change in the electrical property of the TFTs formed on the flexible substrate and to thus reduce a change in the amount of current that flows in the channels of the TFTs.Type: ApplicationFiled: July 13, 2006Publication date: January 25, 2007Inventors: Jae Jeong, Jae Koo, Hyun Shin, Yeon Mo, Jong Jeong, Hun Lee, Sung Kim
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Publication number: 20070001928Abstract: A flat panel display and method for driving the same. The flat panel display includes a conductive substrate forming an image display unit having at least one thin film transistor and a pad unit including a plurality of terminals, wherein the conductive substrate is laminated with a plurality of insulating layers to form the image display unit and the pad unit; a substrate-exposing part for exposing the conductive substrate is formed by removing at least one area of the insulating layers formed on the pad unit; a system control panel for supplying a reverse bias voltage through the substrate-exposing part, wherein the system control panel is electrically connected with the pad unit; and a metal member for transferring the reverse bias voltage to the conductive substrate, wherein the metal member is formed between the substrate-exposing part and the system control panel.Type: ApplicationFiled: June 28, 2006Publication date: January 4, 2007Inventors: Jae Jeong, Jae Koo, Hyun Shin, Se Kwon, Yeon Mo, Keum Kim
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Publication number: 20060289868Abstract: A flat panel display for preventing a thin film transistor from deteriorating due to voltage, static electricity, and external force, accidentally applied to a substrate, and a method for driving the same. The flat panel display includes a conductive substrate, at least one insulating layer formed on the conductive substrate, at least one thin film transistor formed on the conductive substrate, and a ground formed in a region of the conductive substrate to ground the conductive substrate. Thus, the deterioration of the thin film transistor that would be generated by voltage, static electricity, or external force, accidentally applied to the conductive substrate can be substantially prevented and the performance of the display is enhanced.Type: ApplicationFiled: June 27, 2006Publication date: December 28, 2006Inventors: Jae Jeong, Jae Koo, Hyun Shin, Se Kwon, Yeon Mo, Keum Kim