Abstract: A sound generator, capable of improving a DRAM download speed and reducing power consumption when operating a DRAM download by applying a dedicated download logic, may increase the download speed up to 8 times at the minimum to 62 times at the maximum, and reduce power consumption by decreasing unnecessary clockings. In addition, since the sound generator according to the present invention does not access a parameter memory when downloading, previously processed data is not erroneously handled, and there is no need to rewrite new data to an internal memory after the download operation is completed.

Abstract: The present invention related to a semiconductor memory that prevents malfunctions by simplifying input paths of an address decoder and by controlling an output timing of a decoded internal address signal. The present invention includes an address signal generator producing complementary signals. An external address is inputted to the address signal generator by a first control signal and is latched by a second control signal. A decoder generates an internal address by receiving one of the complementary address signals and by decoding the address signal and its inverted signal.

Abstract: A semiconductor memory includes a control signal generator for generating a first control signal, a second control signal, and a third control signal; a first inverter for receiving an external address in accordance with the first control signal; a latch enabled by the second control signal and latching an output of the first inverter; and an address signal generator enabled by the third control signal, the address signal generator generating complementary address signals by using outputs of the first inverter and the latch.